HD6432160 RENESAS [Renesas Technology Corp], HD6432160 Datasheet - Page 397

• Manufacturer Part Number: HD6432160
• Description: Hitachi 16-Bit Single-Chip Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

15.4
Figure 15.2 shows the general format for asynchronous serial communication. One frame consists
of a start bit (low level), followed by transmit/receive data, a parity bit, and finally stop bits (high
level). In asynchronous serial communication, the transmission line is usually held in the mark
state (high level). The SCI monitors the transmission line, and when it goes to the space state (low
level), recognizes a start bit and starts serial communication. Inside the SCI, the transmitter and
receiver are independent units, enabling full-duplex communication. Both the transmitter and the
receiver also have a double-buffered structure, so that data can be read or written during
transmission or reception, enabling continuous data transfer and reception.
15.4.1
Table 15.8 shows the data transfer formats that can be used in asynchronous mode. Any of 12
transfer formats can be selected according to the SMR setting. For details on the multiprocessor
bit, refer to section 15.5, Multiprocessor Communication Function.
Serial
data
Operation in Asynchronous Mode
Data Transfer Format
1
Start
bit
1 bit
Figure 15.2 Data Format in Asynchronous Communication
0
LSB
D0
(Example with 8-Bit Data, Parity, Two Stop Bits)
One unit of transfer data (character or frame)
D1
D2
Transmit/receive data
D3
7 or 8 bits
D4
D5
D6
MSB
D7
Parity
bit
1 bit or
none
Rev. 2.0, 08/02, page 357 of 788
0/1
Stop bit
1
1 or 2 bits
1
(mark state)
Idle state
1