HD6432160 RENESAS [Renesas Technology Corp], HD6432160 Datasheet - Page 76
HD6432160
Manufacturer Part Number
HD6432160
Description
Hitachi 16-Bit Single-Chip Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6432160.pdf
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2.4.2
This 24-bit counter indicates the address of the next instruction the CPU will execute. The length
of all CPU instructions is 2 bytes (one word), so the least significant PC bit is ignored. (When an
instruction is fetched for read, the least significant PC bit is regarded as 0.)
2.4.3
EXR does not affect operation in this LSI.
Bit
7
6 to 3
2 to 0
2.4.4
This 8-bit register contains internal CPU status information, including an interrupt mask bit (I) and
half-carry (H), negative (N), zero (Z), overflow (V), and carry (C) flags. Operations can be
performed on the CCR bits by the LDC, STC, ANDC, ORC, and XORC instructions. The N, Z, V,
and C flags are used as branching conditions for conditional branch (Bcc) instructions.
Rev. 2.0, 08/02, page 36 of 788
Bit Name
T
—
I2
I1
I0
Program Counter (PC)
Extended Control Register (EXR)
Condition-Code Register (CCR)
0
All 1
All 1
Initial Value R/W
SP (ER7)
R/W
R
R/W
Figure 2.8 Stack
Description
Trace Bit
Does not affect operation in this LSI.
Reserved
These bits are always read as 1.
Interrupt Mask Bits 2 to 0
Do not affect operation in this LSI.
Free area
Stack area
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