HD6432160 RENESAS [Renesas Technology Corp], HD6432160 Datasheet - Page 586

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HD6432160

Manufacturer Part Number
HD6432160
Description
Hitachi 16-Bit Single-Chip Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
19.4.5
A host interrupt request can be issued from the host interface by means of the SERIRQ pin. In a
host interrupt request via the SERIRQ pin, LCLK cycles are counted from the start frame of the
serialized interrupt transfer cycle generated by the host or a peripheral function, and a request
signal is generated by the frame corresponding to that interrupt. The timing is shown in figure
19.6.
The serialized interrupt transfer cycle frame configuration is as follows. Two of the states
comprising each frame are the recover state in which the SERIRQ signal is returned to the 1-level
at the end of the frame, and the turnaround state in which the SERIRQ signal is not driven. The
recover state must be driven by the host or slave processor that was driving the preceding state.
Rev. 2.0, 08/02, page 546 of 788
LCLK
SERIRQ
Drive source
H = Host control, SL = Slave control, R = Recovery, T = Turnaround, S = Sample
LCLK
SERIRQ
Driver
H = Host control, R = Recovery, T = Turnaround, S = Sample, I = Idle
Host Interface Serialized Interrupt Operation (SERIRQ)
IRQ14 frame
S
IRQ1
None
SL
or
H
R
T
START
Host controller
Start frame
H
IRQ15 frame
S
IRQ15
Figure 19.6 SERIRQ Timing
R
R
T
T
S
None
IRQ0 frame
S
R
None
frame
R
T
T
I
S
IRQ1 frame
IRQ1
Host controller
Stop frame
STOP
H
R
T
R
S
IRQ2 frame
T
None
R
Next cycle
T
START

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