HD6432160 RENESAS [Renesas Technology Corp], HD6432160 Datasheet - Page 472
HD6432160
Manufacturer Part Number
HD6432160
Description
Hitachi 16-Bit Single-Chip Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6432160.pdf
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Receive Operation Using the Wait Function:
Figures 16.14 and 16.15 show the sample flowcharts for the operations in master receive mode
(WAIT = 1).
Rev. 2.0, 08/02, page 432 of 788
(master output)
(master output)
(slave output)
User processing
ICDRR
ICDRF
SCL
SDA
SDA
IRTR
IRIC
(master output)
(master output)
(slave output)
User processing
Master transmit mode
ICDRR
ICDRF
SCL
SDA
SDA
IRTR
IRIC
Figure 16.13 Example of Stop Condition Issuance Operation Timing
Figure 16.12 Example of Operation Timing in Master Receive Mode
Bit 1
Data 1
Data 2
7
[4] IRIC clear
Bit 0
A
9
in Master Receive Mode (MLS = WAIT = 0, HNDS = 1)
8
[1] TRS=0 clear
[6] Set ACKB = 1
A
[3]
9
SCL is fixed low until ICDR is read
SCL is fixed low until ICDR is read
Master receive mode
[1] IRIC clear
Bit 7
1
[7] ICDR read
(MLS = WAIT = 0, HNDS = 1)
(Data 2)
Bit 7
Bit 6
1
2
Bit 6
Bit 5
2
3
Data 1
[2] IRIC read
Undefined value
Bit 5
(Dummy read)
Bit 4
3
Data 2
Data 3
4
Bit 4
Bit 3
4
5
Bit 3
Bit 2
5
6
Bit 2
Bit 1
6
7
[4] IRIC clear
Bit 1
Bit 0
SCL is fixed low until
stop condition is issued
7
[9] IRIC clear
8
Bit 0
A
[3]
8
9
SCL is fixed low until ICDR is read
[11] Set BBSY=0 and
(Stop condition instruction issuance)
A
[8]
9
SCP=0
[5] ICDR read
(Data 1)
Data 1
Stop condition generation
Bit 7
[10] ICDR read
1
Data 2
(Data 3)
Bit 6
2
Data 3
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