HD6432160 RENESAS [Renesas Technology Corp], HD6432160 Datasheet - Page 186

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HD6432160

Manufacturer Part Number
HD6432160
Description
Hitachi 16-Bit Single-Chip Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Table 7.3
7.5.3
In block transfer mode, one activation source transfers one block of data. Either the transfer source
or the transfer destination is designated as a block area. Table 7.4 lists the register functions in
block transfer mode. The block size can be between 1 and 256. When the transfer of one block
ends, the initial state of the block size counter and the address register that is specified as the block
area is restored. The other address register is then incremented, decremented, or left fixed
according to the register information. From 1 to 65,536 transfers can be specified. Once the
specified number of transfers have been completed, a CPU interrupt is requested.
Rev. 2.0, 08/02, page 146 of 788
Name
DTC source address register
DTC destination address register
DTC transfer count register AH
DTC transfer count register AL
DTC transfer count register B
DAR
SAR
or
Block Transfer Mode
Register Functions in Repeat Mode
Figure 7.6 Memory Mapping in Repeat Mode
Repeat area
SAR
DAR
Abbreviation
CRAH
CRAL
CRB
Transfer
Function
Transfer source address
Transfer destination address
Holds number of transfers
Transfer Count
Not used
DAR
SAR
or

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