HD6432160 RENESAS [Renesas Technology Corp], HD6432160 Datasheet - Page 342
HD6432160
Manufacturer Part Number
HD6432160
Description
Hitachi 16-Bit Single-Chip Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6432160.pdf
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Table 13.2 Synchronization Signal Connection Enable
Rev. 2.0, 08/02, page 302 of 788
Bit
3
2
1
0
Bit 5
SCONE
0
1
Don’t care
HFINV
VFINV
HIINV
VIINV
Bit Name
Mode
Normal connection (Initial value) FTIA
Synchronization signal
connection mode
Initial Value
0
0
0
0
R/W
R/W
R/W
R/W
R/W
input
IVI
signal
FTIA
Description
Input Synchronization Signal Inversion
These bits select inversion of the input phase of the
spare horizontal synchronization signal (HFBACKI),
the spare vertical synchronization signal (VFBACKI),
the horizontal synchronization signal (HSYNCI),
composite synchronization signal (CSYNCI), and the
vertical synchronization signal (VSYNCI).
0: The HFBACKI pin state is used directly as the
HFBACKI input
1: The HFBACKI pin state is inverted before use as
the HFBACKI input
0: The VFBACKI pin state is used directly as the
VFBACKI input
1: The VFBACKI pin state is inverted before use as the
VFBACKI input
0: The HSYNCI and CSYNCI pin states are used
directly as the HSYNCI and CSYNCI inputs
1: The HSYNCI and CSYNCI pin states are inverted
before use as the HSYNCI and CSYNCI inputs
0: The VSYNCI pin state is used directly as the
VSYNCI input
1: The VSYNCI pin state is inverted before use as the
VSYNCI input
Description
HFINV
VFINV
HIINV
VIINV
FTIB
FTIB
input
TMO1
signal
FTIC
FTIC
input
VFBACKI
input
FTID
FTID
input
IHI
signal
TMCI1 TMRI1
TMCI1
input
IHI
signal
TMRI1
input
IVI
inverse
signal
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