TMP91xy40FG Toshiba, TMP91xy40FG Datasheet - Page 85

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TMP91xy40FG

Manufacturer Part Number
TMP91xy40FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy40FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
M/F
Rom Combinations
128
Ram Combinations
4
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
4
I2c/sio Bus Channels
-
(s)dram Controller
-
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
3
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
-
Dual Clock
Y
Number Of I/o Ports
61
Power Supply Voltage(v)
2.2 to 3.6
ECIN1 pin input
Window gate
pulse
Counter
TC1SR<HEOVF>
INTTMR1 interrupt
* Before changing the <TC1SEL>, <TC1M> and TREG1A, be sure to once change the source clock to an internal clock.
Programming sequences (Be sure to follow these sequences)
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
Setting initial values
Changing the source clock (after the timer is started)
(TC1CR2),0A8H
(TC1CR1),83H
(TREG1B),11H
(TC1CR1),9FH
(TC1CR1),0DFH
(TC1CR1),9FH
(TC1CR1),83H
(TC1CR2),0A9H
(TC1CR1),9FH
(TC1CR1),0DFH
FFFD
Figure 3.8.11 Frequency Measurement Mode Timing Chart
FFFE
: Select the frequency measurement mode.
: <Ta>=1, <Tb>=1
: Set the source clock to the ECIN1 pin input.
: Start the timer.
: Stop the timer & clear the counter.
: Set <TC1SEL>=1 to change to fs.
: Set the source clock to the ECIN1 pin input.
: Start the timer.
: <TC1SEL>=0 to select fc
: Set the source clock to internal clock once.
<SEG>=1 (Count on the rising/falling edges of ECIN1)
<SGP>=01 (Internal window gate pulse)
<SGEDG>=0 (Interrupt at the falling edge of WGP)
<WGPSCK>=10 (fc/2
FFFF
(Counter overlow)
91CW40-83
0
14
)
1
2
3
Read
4
TMP91CW40
2008-09-19
Clear
0

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