TMP91xy40FG Toshiba, TMP91xy40FG Datasheet - Page 133

• Manufacturer Part Number: TMP91xy40FG
• Manufacturer: Toshiba

Specifications of TMP91xy40FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M/F
• Rom Combinations: 128
• Ram Combinations: 4
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 4
• I2c/sio Bus Channels: -
• (s)dram Controller: -
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 3
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: -
• Dual Clock: Y
• Number Of I/o Ports: 61
• Power Supply Voltage(v): 2.2 to 3.6

<LCDCKMOD>
SYSCR3
3.11 LCD Driver
LCDCLK
3.11.1 Configuration
fc
Selector
Counter
fc/2
fc/2
fc/2
fc/2
display (LCD). The LCD is connected using the following pins:
The TMP91CW40 contains a driver and a control circuit for directly driving a liquid crystal
The C0, C1, V1, V2 and V3 pins are also available for the voltage reducer in the LCD driver.
The LCD driver can directly drive the following four types of LCDs:
11
10
9
8
, fs/2
, fs
, fs/2
, fs/2
fs
a. Segment output pins
b. Segment output/port (P0, P1, P2, PB) multiplexed pins
c. Common output pins
a.
b.
c.
d.
Regulated voltage reducer
3
2
C0 C1 V1 V2 V3
1/4 duty (1/3 bias) LCD: up to 160 pixels (8 segments x 20 commons)
1/3 duty (1/3 bias) LCD: up to 120 pixels (8 segments x 15 commons)
1/2 duty (1/2 bias) LCD: up to 80 pixels (8 segments x 10 commons)
Static LCD: up to 40 pixles (8 segments x 5 commons)
LCD driver control register
EDSP BRES
7
6
5
VFSEL
4
COM0
Figure 3.11.1 LCD Driver
Blanking
3
Duty control
DUTY
control
Common driver
LCDCR
fc/2
fc/2
fc/2
fc/2
91CW40-131
19
18
17
16
2
, fs/2
, fs/2
, fs/2
, fs/2
to
1
10
9
8
7
COM3
SLF
generator
Timing
0
SEG0
to
SEG7
Display data buffer registers
Display data selection control
: 8 pins (SEG7 to SEG0)
: 32 pins (SEG39 to SEG8)
: 4 pins (COM3 to COM0)
Display data registers
SEG8
Segment driver
to
TMP91CW40
2008-09-19
SEG39