TMP91xy40FG Toshiba, TMP91xy40FG Datasheet - Page 60

• Manufacturer Part Number: TMP91xy40FG
• Manufacturer: Toshiba

Specifications of TMP91xy40FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M/F
• Rom Combinations: 128
• Ram Combinations: 4
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 4
• I2c/sio Bus Channels: -
• (s)dram Controller: -
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 3
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: -
• Dual Clock: Y
• Number Of I/o Ports: 61
• Power Supply Voltage(v): 2.2 to 3.6

3.5.6
Port A (PA0 to PA5)
(1) PA0, PA3 (TXD2, TXD3)
programmed for input or output. Reset operation initialize all pins as input port pins.
All bits in the output latch register (PA) are set to 1. In addition to functioning as a
general-purpose input/output port, Port A can also function as input/output pins for
serial channels 2 and 3. This alternate function can be enabled by writing 1 in
respective bits of the Port A function register (PAFC). Upon reset, the PACR and PAFC
are all initialized to 0, setting all pins as input port pins.
output pins for serial channels 2 and 3.
TXD2, TXD3
<ODEA3> bits of the ODE register.
Port A is a 6-bit general-purpose input/output port. Each bit can be individually
PA0 and PA3 can be used either as general-purpose input/output port pins or TXD
The output buffer is configurable as an open-drain output using the <ODEA0> and
Function control
Direction control
Output latch
PAFC write
PA write
PACR write
Reset
PA read
(Bitwise)
(Bitwise)
S
Figure 3.5.15 Port A (PA0, PA3)
A
B
Selector
Selector
91CW40-58
S
S
B
A
ODE<ODEA0, A3>
open-drain output
Configurable as
PA0 (TXD2)
PA3 (TXD3)
TMP91CW40
2008-09-19