TMP91xy40FG Toshiba, TMP91xy40FG Datasheet - Page 26

• Manufacturer Part Number: TMP91xy40FG
• Manufacturer: Toshiba

Specifications of TMP91xy40FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M/F
• Rom Combinations: 128
• Ram Combinations: 4
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 4
• I2c/sio Bus Channels: -
• (s)dram Controller: -
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 3
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: -
• Dual Clock: Y
• Number Of I/o Ports: 61
• Power Supply Voltage(v): 2.2 to 3.6

Figure 3.3.7 Example Timings for Exiting a HALT Mode (STOP Mode) with an Interrupt
<RSYSCK>
SYSCR0
c.
A0 to A21
Wakeup
interrupt
0 (fc)
1 (fs)
STOP mode
states in STOP mode depend on the setting of the SYSCR2<DRVE> bit, as shown in
Table 3.3.6.
to allow sufficient time for the oscillator to restart and stabilize before exiting STOP
mode. After that, the system clock output can restart. Upon exiting STOP mode, the
operation resumes according to the settings in the SYSCR0<RXEN>, <RXTEN> and
<RSYSCK> bits. These bits must be set before executing the HALT instruction. The
warm-up period is chosen through the SYSCR2<WUPTM1:0> bits, as shown in Table
3.3.5.
X1
RD
3.3.5 Example Warm-Up Period Settings (when exiting STOP mode)
In STOP mode, the whole TMP91CW40 stops, including the internal oscillator. Pin
Upon detection of wakeup signaling, the warm-up period timer should be activated
Figure 3.3.7 shows example timings for exiting STOP mode with an interrupt.
Address
01 (2
7.8 ms
9.5 μs
8
)
91CW40-24
STOP
mode
SYSCR2<WUPTM1:0>
Warm-up
period
10 (2
0.607 ms
500 ms
14
)
fc = 27 MHz, fs = 32.768 kHz
Address + 2
2.427 ms
2000 ms
11 (2
16
)
TMP91CW40
2008-09-19