TMP91xy40FG Toshiba, TMP91xy40FG Datasheet - Page 57

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TMP91xy40FG

Manufacturer Part Number
TMP91xy40FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy40FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
M/F
Rom Combinations
128
Ram Combinations
4
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
4
I2c/sio Bus Channels
-
(s)dram Controller
-
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
3
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
-
Dual Clock
Y
Number Of I/o Ports
61
Power Supply Voltage(v)
2.2 to 3.6
3.5.5
Port 9 (P90 to P95)
(1) P90, P93 (TXD0, TXD1)
programmed for input or output. Reset operation initializes all pins as input port pins.
All bits in the output latch register (P9) are set to “1”. In addition to functioning as a
general-purpose input/output port, Port 9 can also function as input/output pins for
serial channels 0 and 1. This alternate function can be enabled by writing “1” to
respective bits of the Port 9 function register (P9FC). Upon reset the P9CR and P9FC
registers are all initialized to “0”, setting all pins as input port pins.
output pins for serial channels 0 and 1.
<ODE93> bits of the ODE register.
TXD0, TXD1
Port 9 is a 6-bit general-purpose input/output port. Each bit can be individually
P90 and P93 can be used either as general-purpose input/output port pins or TXD
The output buffer is configurable as an open-drain output using the <ODE90> and
Direction control
Function control
Output latch
P9FC write
P9 write
P9CR write
Reset
P9 read
(Bitwise)
(Bitwise)
S
Figure 3.5.11 Port 9 (P90, P93)
A
B
Selector
Selector
91CW40-55
S
S
B
A
ODE<ODE90, 93>
open-drain output
Configurable as
P90 (TXD0)
P93 (TXD1)
TMP91CW40
2008-09-19

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