TMP91xy40FG Toshiba, TMP91xy40FG Datasheet - Page 69

• Manufacturer Part Number: TMP91xy40FG
• Manufacturer: Toshiba

Specifications of TMP91xy40FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M/F
• Rom Combinations: 128
• Ram Combinations: 4
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 4
• I2c/sio Bus Channels: -
• (s)dram Controller: -
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 3
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: -
• Dual Clock: Y
• Number Of I/o Ports: 61
• Power Supply Voltage(v): 2.2 to 3.6

3.5.10 Port B (PB0 to PB7)
programmed for input or output. Reset operation initializes all pins as input port pins. All
bits of the output latch register (PB) are set to 0. In addition to functioning as a
general-purpose input/output port, Port B can also function as LCD segment output pins.
This alternate function can be enabled by writing 1 to respective bits of the LCD output
control 4 register (LCDSW4). Upon reset, the PBCR and LCDSW4 registers are all
initialized to 0, setting all pins as input port pins.
Port B is an 8-bit general-purpose input/output port. Each bit can be individually
LCDSW4 write
Direction control
Function control
PBCR write
Output latch
Reset
PB write
(Bitwise)
(Bitwise)
PB read
Figure 3.5.25 Port B (PB0 to PB7)
Selector
S
91CW40-67
B
A
<EDSP>
SEG32 to SEG39
TMP91CW40
2008-09-19
PB0 to PB7
(SEG32 to SEG39)