TMP91xy40FG Toshiba, TMP91xy40FG Datasheet - Page 138

• Manufacturer Part Number: TMP91xy40FG
• Manufacturer: Toshiba

Specifications of TMP91xy40FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M/F
• Rom Combinations: 128
• Ram Combinations: 4
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 4
• I2c/sio Bus Channels: -
• (s)dram Controller: -
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 3
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: -
• Dual Clock: Y
• Number Of I/o Ports: 61
• Power Supply Voltage(v): 2.2 to 3.6

Figure 3.11.6 Example of LCD Power Supply Connection when Using External Divider Resistors (LCDCR<BRES> = 0)
When external divider resistors are used, the following condition must be met:
Figure 3.11.5 Example of LCD Power Supply Connection when Using the Voltage Reducer (LCDCR<BRES> = 1)
VCC
1/3 bias (R1 = R2 = R3)
VCC
VSS
≥
V
3
(3) LCD drive power supply
≥
V
2
reducer incorporated in the LCD driver that reduces the external reference voltage, or
external divider resistors that divide the exernal reference voltage. This selection is
made in the <BRES> field in the LCD control register (LCDCR).
reduced to two-thirds (2/3) or one-third (1/3) to generate the output voltage for
segment/common signals.
external resistors and the divided voltages are input to the V1, V2 and V3 pins to
generate the output voltage for segment/common signals.
selected base frequency for the voltage reducer.
Table 3.11.2 shows the current carrying capacities of the V3 pin according to the
C0
C1
V3
V2
V1
LCDCR. The segment/common drive capability can be increased by selecting a higher
frequency.
≥
Contrast
adjustment
To obtain the LCD drive power supply, the TMP91CW40 can use either the voltage
When the voltage reducer is used, the reference voltage connected to the V3 pin is
When external divider resistors are used, the external power supply is divided by
The voltage reducer only supports 1/3 bias.
The base frequency for the voltage reducer is selected by the <VFSEL> field in the
V
1
≥
Open
Open
VSS
V
C = 0.1 to 0.47 μF
3
＝VCC
R1
R2
R3
1/2 bias (R1 = R2)
VCC
VSS
91CW40-136
V3
V2
C0
C1
V1
Contrast
adjustment
VCC
VSS
Open
Open
R1
R2
V3
V2
V1
C1
C0
C
C
C
C
VCC
VSS
Static
V3
V2
C0
C1
V1
Contrast
adjustment
TMP91CW40
2008-09-19
Open
Open
R1