TMP91xy40FG Toshiba, TMP91xy40FG Datasheet - Page 187

• Manufacturer Part Number: TMP91xy40FG
• Manufacturer: Toshiba

Specifications of TMP91xy40FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M/F
• Rom Combinations: 128
• Ram Combinations: 4
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 4
• I2c/sio Bus Channels: -
• (s)dram Controller: -
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 3
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: -
• Dual Clock: Y
• Number Of I/o Ports: 61
• Power Supply Voltage(v): 2.2 to 3.6

(3) Starting an AD conversion
(4) Conversion modes and conversion end interrupts
a.
b.
falling edge is applied to the
conversion starts, the AD conversion busy flag (ADMOD0<ADBF>) is set to 1.
and start sampling the selected channel to begin a new conversion. The conversion
result store flag (ADREGxL<ADRxRF>) indicates whether or not the result register
contains a valid digital result at that point.
while a conversion is in progress.
•
•
•
•
ADMOD0.
ADMOD0<EOCF> is set to 1.
Fixed-channel single conversion mode
ADMOD0 to 00. In fixed-channel single conversion mode, the AD converter performs a
single conversion on a single selected channel. When the conversion is completed,
ADMOD0<EOCF> is set to 1, ADMOD0<ADBF> is cleared to 0, and an INTAD
interrupt is generated.
Channel scan single conversion mode
ADMOD0 to 01. In channel scan single conversion mode, the AD converter performs a
single conversion on each of a selected group of channels. When the single conversion
sequence is completed, ADMOD0<EOCF> is set to 1, ADMOD0<ADBF> is cleared to 0,
and an INTAD interrupt is generated.
The AD converter starts a conversion when ADMOD0<ADS> is set to 1, or when a
Setting the <ADS> bit to 1 causes the AD converter to abort any ongoing conversion
In external conversion trigger mode, a falling edge on the
The AD converter supports the following four conversion modes:
The conversion mode is selected by the <REPEAT> and <SCAN> bits in the
At the end of the conversion process, an INTAD interrupt is generated and
This mode is selected by programming the <REPEAT> and <SCAN> bits in the
This mode is selected by programming the <REPEAT> and <SCAN> bits in the
Fixed-channel single conversion mode
Channel scan conversion mode
Fixed-channel continuous conversion mode
Channel scan continuous conversion mode
91CW40-185
ADTRG
pin with ADMOD1<ADTRGE> set to 1. When a
ADTRG
TMP91CW40
pin is ignored
2008-09-19