TMP91xy40FG Toshiba, TMP91xy40FG Datasheet - Page 130

• Manufacturer Part Number: TMP91xy40FG
• Manufacturer: Toshiba

Specifications of TMP91xy40FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M/F
• Rom Combinations: 128
• Ram Combinations: 4
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 4
• I2c/sio Bus Channels: -
• (s)dram Controller: -
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 3
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: -
• Dual Clock: Y
• Number Of I/o Ports: 61
• Power Supply Voltage(v): 2.2 to 3.6

Note: The slave controller’s TXD pin must be configured as an open-drain output by programming the ODE register.
TXD
(4) Mode 3 (9-bit UART)
Wakeup feature
Master
mode, no parity bit can be added.
operations and in the SC0CR<RB8> bit in receive operations. Transmit and receive
data must be read and written with the most-significant bit first, followed by the
SC0BUF.
multidrop system to wake up whenever an address character is received. Setting the
SC0MOD0<WU> bit to 1 enables the wakeup feature. When the SC0CR<RB8> bit has
received an address/data flag bit set to 1, the receiver generates the INTRX0 interrupt.
Setting the SC0MOD0<SM1:0> field to 11 puts the SIO0 in 9-bit UART mode. In this
The most-significant bit (9th bit) is stored in the SC0MOD0<TB8> bit in transmit
In 9-bit UART mode, the receiver wakeup feature allows the slave controller in a
RXD
Figure 3.10.20 Serial Link Using the Wakeup Function
TXD
Slave 1
91CW40-128
RXD
TXD
Slave 2
RXD
TXD
Slave 3
TMP91CW40
2008-09-19
RXD