TMP91xy40FG Toshiba, TMP91xy40FG Datasheet - Page 181

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TMP91xy40FG

Manufacturer Part Number
TMP91xy40FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy40FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
M/F
Rom Combinations
128
Ram Combinations
4
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
4
I2c/sio Bus Channels
-
(s)dram Controller
-
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
3
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
-
Dual Clock
Y
Number Of I/o Ports
61
Power Supply Voltage(v)
2.2 to 3.6
AN3/
3.16
ADTRG
AN2 (P52)
AN1 (P51)
AN0 (P50)
VREFH
VREFL
(P53)
Note:
Analog-to-Digital Converter (AD Converter)
converter) having 4 channels of analog inputs.
(AN0 to AN3) can be used as general-purpose digital inputs (Port 5) if not needed as analog
channels.
The TMP91CW40 has a 10-bit successive-approximation analog-to-digital converter (AD
Figure 3.16.1 shows a block diagram of the AD converter. The four analog input channels
Ensure that the AD converter has halted before executing the HALT instruction to place the TMP91CW40 in IDLE2,
IDLE1 or STOP mode to reduce power supply current. Otherwise, the TMP91CW40 might go into a standby mode
while the internal analog comparator is still active.
AD mode control register 1
ADMOD1
<ADCH2:0>
Channel
selector
Internal data bus
<ADTRGE>
<VREFON>
Figure 3.16.1 AD Converter Block Diagram
and-hold
Sample-
<EOCF><ADBF><ITM0><REPEAT><SCAN><ADS>
91CW40-179
End
AD mode control register 0 ADMOD0
Busy
DA converter
Internal data bus
Comparator
Interrupt
+
AD converter
control circuit
Repeat
Scan
Interrupt request
Start
INTAD
ADREG04H to 37H
ADREG04L to 37L
ADTRG
AD conversion
result register
Internal data bus
TMP91CW40
2008-09-19

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