TMP91xy40FG Toshiba, TMP91xy40FG Datasheet - Page 207

• Manufacturer Part Number: TMP91xy40FG
• Manufacturer: Toshiba

Specifications of TMP91xy40FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M/F
• Rom Combinations: 128
• Ram Combinations: 4
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 4
• I2c/sio Bus Channels: -
• (s)dram Controller: -
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 3
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: -
• Dual Clock: Y
• Number Of I/o Ports: 61
• Power Supply Voltage(v): 2.2 to 3.6

6.
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Port Section Equivalent Circuit Diagrams
• Reading the circuit diagrams
[74HCXX] series.
• The input protection resistance ranges from several tens of ohms to several hundreds of ohms.
Basically, the gate symbols written are the same as those used for the standard CMOS logic IC
The dedicated signal is described below.
P5 (AN0~AN3/KWI0~KWI3)
P60 (INT0)
P0 (SEG24~SEG31), P1 (SEG16~SEG23), P2 (SEG8~SEG15), PB (SEG32~SEG39)
STOP : This signal becomes active 1 when the HALT mode setting register is set to the
LCD Output enable
Output enable
STOP mode (SYSCR2<HALTM1:0> = “01”) and the CPU executes the HALT
instruction. When the drive enable bit SYSCR2<DRVE> is set to “1”, however
STOP remains at “0”.
Output data
Input data
STOP
Channel select
Analog input
Analog input
Input data
Input data
91CW40-205
Input enable
Input enable
Input enable
V
CC
P-ch
N-ch
SEG Output
Input
Input
Input/Output
TMP91CW40
2008-09-19