TMP91xy40FG Toshiba, TMP91xy40FG Datasheet - Page 8

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TMP91xy40FG

Manufacturer Part Number
TMP91xy40FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy40FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
M/F
Rom Combinations
128
Ram Combinations
4
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
4
I2c/sio Bus Channels
-
(s)dram Controller
-
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
3
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
-
Dual Clock
Y
Number Of I/o Ports
61
Power Supply Voltage(v)
2.2 to 3.6
Pin Name
P93
TXD1
P94
RXD1
P95
SCLK1
CTS1
PA0
TXD2
PA1
RXD2
PA2
SCLK2
CTS2
PA3
TXD3
PA4
RXD3
PA5
SCLK3
CTS3
SEG0 to SEG7
P20 to P27
SEG8 to SEG15
P10 to P17
SEG16 to SEG23
P00 to P07
SEG24 to SEG31
PB0 to PB7
SEG32 to SEG39
C0,C1
V1 to V3
COM0 to COM3
AM0, AM1
EMU0
EMU1
RESET
VREFH
VREFL
AVCC
AVSS
X1/X2
XT1/XT2
DVCC
DVSS
NMI
Number
of Pins
1
1
1
1
1
1
1
1
1
8
8
8
8
8
2
3
4
1
2
1
1
1
1
1
1
1
2
2
4
4
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Table 2.2.2 Pin Names and Functions (2/2)
Port 93: Input/output port
Serial 1 transmit data
Open-drain output mode by programmable
Port 94: Input/output port
Serial 1 receive data
Port 95: Input/output port
Serial 1 clock input/output
Serial 1 data transmit enable (Clear to send)
Port A0: Input/output port
Serial 2 transmit data
Open-drain output mode by programmable
Port A1: Input/output port
Serial 2 receive data
Port A2: Input/output port
Serial 2 clock input/output
Serial 2 data transmit enable (Clear to send)
Port 3: Input/output port
Port A4: Input/output port
Serial 3 receive data
Port A5: Input/output port
Serial 3 clock input/output
Serial 3 data transmit enable (Clear to send)
Segment output
Port 2: Input/output port
Segment output
Port 1: Input/output port
Segment output
Port 0: Input/output port
Segment output
Port B: Input/output port
Segment output
LCD drive power supply
LCD drive power supply
Common output
Nonmaskable interrupt request pin: Causes an NMI interrupt on the falling edge;
programmable to be rising-edge sensitive (Schmitt input).
Operation mode
Both AM0 and AM1 should be held at logic 1.
This pin should be left open.
This pin should be left open.
Reset: Initializes the TMP91CW40. (Schmitt input, with pull-up resistor)
Input pin for high reference voltage for the AD converter
Input pin for low reference voltage for the AD converter
Power supply pin for the AD converter
Ground pin for the AD converter (0 V)
Connection pins for a high-frequency oscillator
Connection pins for a low-frequency oscillator
Power supply pins (The DVCC pins should be connected to power supply.)
Ground pins (The DVSS pins should be connected to ground (0 V).)
Serial 3 transmit data
Open-drain output mode by programmable
91CW40-6
Function
TMP91CW40
2008-09-19

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