AT32UC3L0256 Atmel Corporation, AT32UC3L0256 Datasheet - Page 611

• Manufacturer Part Number: AT32UC3L0256
• Manufacturer: Atmel Corporation

Specifications of AT32UC3L0256

• Flash (kbytes): 256 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 50 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 17
• Hardware Qtouch Acquisition: Yes
• Max I/o Pins: 36
• Ext Interrupts: 36
• Usb Speed: No
• Usb Interface: No
• Spi: 5
• Twi (i2c): 2
• Uart: 4
• Lin: 4
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 460
• Analog Comparators: 8
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.62 to 3.6
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 18
• Input Capture Channels: 12
• Pwm Channels: 35
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

26.6.12
26.6.13
26.6.14
26.7
32145A–12/2011
Resistive Touch Screen
Peripheral Events
Sleep Mode
Conversion Performances
clear an active interrupt request, write a one to the corresponding bit in the Interrupt Clear Reg-
ister (ICR).
The source for the interrupt requests are the status bits in the Status Register (SR). The SR
shows the ADCIFB status at the time the register is read. The Interrupt Status Register (ISR)
shows the status since the last write to the Interrupt Clear Register. The combination of ISR and
SR allows the user to react to status change conditions but also allows the user to read the cur-
rent status at any time.
The Peripheral Event System can be used together with the ADCIFB to allow any peripheral
event generator to be used as a trigger source. To enable peripheral events to trigger a conver-
sion sequence the user must write the Peripheral Event Trigger value (0x7) to the Trigger Mode
(TRGMOD) field in the Trigger Register (TRGR). Refer to
must also configure a peripheral event generator to emit peripheral events for the ADCIFB to
trigger on. Refer to the Peripheral Event System chapter for details.
Before entering sleep modes the user must make sure the ADCIFB is idle and that the Analog-
to-Digital Converter cell is inactive. To deactivate the Analog-to-Digital Converter cell the SLEEP
bit in the ADC Configuration Register (ACR) must be written to one and the ADCIFB must be
idle. To make sure the ADCIFB is idle, write a zero the Trigger Mode (TRGMOD) field in the
Trigger Register (TRGR) and wait for the READY bit in the Status Register (SR) to be set.
Note that by deactivating the Analog-to-Digital Converter cell, a startup time penalty as defined
in the STARTUP field in the ADC Configuration Register (ACR) will apply on the next
conversion.
For performance and electrical characteristics of the ADCIFB, refer to the Electrical Characteris-
tics chapter.
The ADCIFB embeds an integrated Resistive Touch Screen Sequencer that can be used to cal-
culate contact coordinates on a resistive touch screen film. When instructed to start, the
integrated Resistive Touch Screen Sequencer automatically applies a sequence of voltage pat-
terns to the resistive touch screen films and the Analog-to-Digital Conversion cell is used to
measure the effects. The resulting measurements can be used to calculate the horizontal and
vertical contact coordinates. It is recommended to use a high resistance touch screen for optimal
resolution.
The resistive touch screen film is connected to the ADCIFB using the AD and ADP pins. See
Section 26.7.3
Resistive Touch Screen Mode is enabled by writing a one to the Touch Screen ADC Mode field
in the Mode Register (MR.TSAMOD). In this mode, channels TSPO+0 though TSPO+3 are
automatically enabled where TSPO refers to the Touch Screen Pin Offset field in the Mode Reg-
ister (MR.TSPO). For each conversion sequence, all enabled channels before TSPO+0 and
after TSPO+3 are converted as ordinary ADC channels, producing 1 conversion result each.
When the sequencer enters the TSPO+0 channel the Resistive Touch Screen Sequencer will
take over control and convert the next 4 channels as described in
for details.
AT32UC3L0128/256
Table 26-4 on page
Section
26.7.4.
623. The user
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