AT32UC3L0256 Atmel Corporation, AT32UC3L0256 Datasheet - Page 609

• Manufacturer Part Number: AT32UC3L0256
• Manufacturer: Atmel Corporation

Specifications of AT32UC3L0256

• Flash (kbytes): 256 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 50 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 17
• Hardware Qtouch Acquisition: Yes
• Max I/o Pins: 36
• Ext Interrupts: 36
• Usb Speed: No
• Usb Interface: No
• Spi: 5
• Twi (i2c): 2
• Uart: 4
• Lin: 4
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 460
• Analog Comparators: 8
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.62 to 3.6
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 18
• Input Capture Channels: 12
• Pwm Channels: 35
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

26.6.5
26.6.6
26.6.7
26.6.8
26.6.9
32145A–12/2011
ADC Clock
ADC Sleep Mode
Startup Time
Sample and Hold Time
ADC Conversion
The ADCIFB generates an internal clock named CLK_ADC that is used by the Analog-to-Digital
Converter cell to perform conversions. The CLK_ADC frequency is selected by writing to the
PRESCAL field in the ADC Configuration Register (ACR). The CLK_ADC range is between
CLK_ADCIFB/2, if PRESCAL is 0, and CLK_ADCIFB/128, if PRESCAL is 63 (0x3F).
A sensible PRESCAL value must be used in order to provide an ADC clock frequency according
to the maximum sampling rate parameter given in the Electrical Characteristics section. Failing
to do so may result in incorrect Analog-to-Digital Converter operation.
The ADC Sleep Mode maximizes power saving by automatically deactivating the Analog-to-Dig-
ital Converter cell when it is not being used for conversions. The ADC Sleep Mode is enabled by
writing a one to the SLEEP bit in the ADC Configuration Register (ACR).
When a trigger occurs while the ADC Sleep Mode is enabled, the Analog-to-Digital Converter
cell is automatically activated. As the analog cell requires a startup time, the logic waits during
this time and then starts the conversion of the enabled channels. When conversions of all
enabled channels are complete, the ADC is deactivated until the next trigger.
The Analog-to-Digital Converter cell has a minimal startup time when the cell is activated. This
startup time is given in the Electrical Characteristics chapter and must be written to the
STARTUP field in the ADC Configuration Register (ACR) to get correct conversion results.
The STARTUP field expects the startup time to be represented as the number of CLK_ADC
cycles between 8 and 1024 and in steps of 8 that is needed to cover the ADC startup time as
specified in the Electrical Characteristics chapter.
The Analog-to-Digital Converter cell is activated at the first conversion after reset and remains
active if ACR.SLEEP is zero. If ACR.SLEEP is one, the Analog-to-Digital Converter cell is auto-
matically deactivated when idle and thus each conversion sequence will have a initial startup
time delay.
A minimal Sample and Hold Time is necessary for the ADCIFB to guarantee the best converted
final value when switching between ADC channels. This time depends on the input impedance
of the analog input, but also on the output impedance of the driver providing the signal to the
analog input, as there is no input buffer amplifier.
The Sample and Hold time has to be programmed through the SHTIM field in the ADC Configu-
ration Register (ACR). This field can define a Sample and Hold time between 1 and 16
CLK_ADC cycles.
ADC conversions are performed on all enabled channels when a trigger condition is detected.
For details regarding trigger conditions see
a specific analog input pin so it can be included or excluded in an Analog-to-Digital conversion
sequence and to identify which AD pin was used to convert the current value in the Last Con-
verted Data Register (LCDR). Channel number N corresponding to AD pin number N.
Section
26.8.1. The term channel is used to identify
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