AT32UC3L0256 Atmel Corporation, AT32UC3L0256 Datasheet - Page 603

• Manufacturer Part Number: AT32UC3L0256
• Manufacturer: Atmel Corporation

Specifications of AT32UC3L0256

• Flash (kbytes): 256 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 50 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 17
• Hardware Qtouch Acquisition: Yes
• Max I/o Pins: 36
• Ext Interrupts: 36
• Usb Speed: No
• Usb Interface: No
• Spi: 5
• Twi (i2c): 2
• Uart: 4
• Lin: 4
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 460
• Analog Comparators: 8
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.62 to 3.6
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 18
• Input Capture Channels: 12
• Pwm Channels: 35
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

25.5
32145A–12/2011
Application Example
tem will only be woken up if the user peripheral generates an interrupt as a result of the
operation. This concept is known as SleepWalking and is described in further detail in the Power
Manager chapter. Note that asynchronous peripheral events may be associated with a delay
due to the need to restart the system clock source if this has been stopped in the sleep mode.
This application example shows how the Peripheral Event System can be used to program the
ADC Interface to perform ADC conversions at selected intervals.
Conversions of the active analog channels are started with a software or a hardware trigger.
One of the possible hardware triggers is a peripheral event trigger, allowing the Peripheral Event
System to synchronize conversion with some configured peripheral event source. From
25-3
peripheral event, or an event from the PWM Controller. The AST can generate periodic periph-
eral events at selected intervals, among other types of peripheral events. The Peripheral Event
System can then be used to set up the ADC Interface to sample an analog signal at regular
intervals.
The user must enable peripheral events in the AST and in the ADC Interface to accomplish this.
The periodic peripheral event in the AST is enabled by writing a one to the corresponding bit in
the AST Event Enable Register (EVE). To select the peripheral event trigger for the ADC Inter-
face, the user must write the value 0x7 to the Trigger Mode (TRGMOD) field in the ADC
Interface Trigger Register (TRGR). When the peripheral events are enabled, the AST will gener-
ate peripheral events at the selected intervals, and the Peripheral Event System will route the
peripheral events to the ADC Interface, which will perform ADC conversions at the selected
intervals.
Figure 25-2. Application Example
Since the AST peripheral event is asynchronous, the description above will also work in sleep
modes where the ADC clock is stopped. In this case, the ADC clock (and clock source, if
needed) will be restarted during the ADC conversion. After the conversion, the ADC clock and
clock source will return to the sleep state, unless the ADC generates an interrupt, which in turn
will wake up the system. Using asynchronous interrupts thus allows ADC operation in much
lower power states than would otherwise be possible.
and
Table
AST
Periodic peripheral
25-4, it can be read that this peripheral event source can be either an AST
event
Peripheral
System
Event
conversion
Trigger
AT32UC3L0128/256
Interface
ADC
Table
603