AT32UC3L0256 Atmel Corporation, AT32UC3L0256 Datasheet - Page 202

• Manufacturer Part Number: AT32UC3L0256
• Manufacturer: Atmel Corporation

Specifications of AT32UC3L0256

• Flash (kbytes): 256 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 50 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 17
• Hardware Qtouch Acquisition: Yes
• Max I/o Pins: 36
• Ext Interrupts: 36
• Usb Speed: No
• Usb Interface: No
• Spi: 5
• Twi (i2c): 2
• Uart: 4
• Lin: 4
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 460
• Analog Comparators: 8
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.62 to 3.6
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 18
• Input Capture Channels: 12
• Pwm Channels: 35
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

13.5.13
13.5.14
13.5.14.1
32145A–12/2011
32kHz RC Oscillator (RC32K)
Generic Clock Prescalers
High resolution prescaler
the BRIFARDY bit in the Interrupt Mask Register (IMR.BRIFARDY) is set. This bit is set by writ-
ing a one to the corresponding bit in the Interrupt Enable Register (IER.BRIFARDY).
After powering up the device the Backup Register Interface Valid bit in PCLKSR (PCLKSR.BRI-
FAVALID) is cleared, indicating that the content of the backup registers has not been written and
contains the reset value. After writing to one of the backup registers the PCLKSR.BRIFAVALID
bit is set. During writes to the backup registers (when BRIFARDY is zero) BRIFAVALID will be
zero. If a reset occurs when BRIFARDY is zero, BRIFAVALID will be cleared after the reset, indi-
cating that the content of the backup registers is not valid. If BRIFARDY is one when a reset
occurs, BRIFAVALID will be one and the content is the same as before the reset.
The user must ensure that BRIFAVALID and BRIFARDY are both set before reading the backup
register values.
Rev: 1.1.0.0
The RC32K can be used as source for the generic clocks, as described in The Generic Clocks
section.
The 32 kHz RC oscillator (RC32K) is forced on after reset, and output on PA20. The clock is
available on the pad until the PPCR.FRC32 bit in the Power Manager has been cleared or a dif-
ferent peripheral function has been chosen on PA20 (PA20 will start with peripheral function F
by default). Note that the forcing will only enable the clock output. To be able to use the RC32K
normally the oscillator must be enabled as described below.
The oscillator is enabled by writing a one to the Enable bit in the 32kHz RC Oscillator Configura-
tion Register (RC32KCR.EN) and disabled by writing a zero to RC32KCR.EN. The oscillator is
also automatically enabled when the sampling mode is requested for the SM33. In this case,
writing a zero to RC32KCR.EN will not disable the RC32K until the sampling mode is no longer
requested.
Rev: 1.0.0.0
The generic clocks can be sourced by two special prescalers to increase the generic clock fre-
quency precision.
These prescalers are named the High Resolution Prescaler (HRP) and the Fractional Prescaler
(FP).
The HRP is a 24-bit counter that can generate a very accurate clock waveform. The clock
obtained has 50% duty cycle.
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