AT32UC3L0256 Atmel Corporation, AT32UC3L0256 Datasheet - Page 352

• Manufacturer Part Number: AT32UC3L0256
• Manufacturer: Atmel Corporation

Specifications of AT32UC3L0256

• Flash (kbytes): 256 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 50 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 17
• Hardware Qtouch Acquisition: Yes
• Max I/o Pins: 36
• Ext Interrupts: 36
• Usb Speed: No
• Usb Interface: No
• Spi: 5
• Twi (i2c): 2
• Uart: 4
• Lin: 4
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 460
• Analog Comparators: 8
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.62 to 3.6
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 18
• Input Capture Channels: 12
• Pwm Channels: 35
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

18.7
18.7.1
32145A–12/2011
User Interface
Access Types
The GPIO controller manages all the GPIO pins on the 32-bit AVR microcontroller. The pins are
managed as 32-bit ports that are configurable through a Peripheral Bus (PB) interface. Each
port has a set of configuration registers. The overall memory map of the GPIO is shown below.
The number of pins and hence the number of ports is product specific.
Figure 18-6. Port Configuration Registers
In the peripheral muxing table in the Package and Pinout chapter each GPIO pin has a unique
number. Note that the PA, PB, PC, and PX ports do not necessarily directly correspond to the
GPIO ports. To find the corresponding port and pin the following formulas can be used:
GPIO port = floor((GPIO number) / 32), example: floor((36)/32) = 1
GPIO pin = GPIO number % 32, example: 36 % 32 = 4
Table 18-2
port address offset. The specific address of a configuration register is found by adding the regis-
ter offset and the port offset to the GPIO start address. One bit in each of the configuration
registers corresponds to a GPIO pin.
Most configuration register can be accessed in four different ways. The first address location can
be used to write the register directly. This address can also be used to read the register value.
The following addresses facilitate three different types of write access to the register. Performing
a “set” access, all bits written to one will be set. Bits written to zero will be unchanged by the
operation. Performing a “clear” access, all bits written to one will be cleared. Bits written to zero
will be unchanged by the operation. Finally, a toggle access will toggle the value of all bits writ-
shows the configuration registers for one port. Addresses shown are relative to the
Port 0 Configuration Registers
Port 1 Configuration Registers
Port 2 Configuration Registers
Port n Configuration Registers
AT32UC3L0128/256
n*0x200
0x0000
0x0200
0x0400
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