AT32UC3L0256 Atmel Corporation, AT32UC3L0256 Datasheet - Page 39

• Manufacturer Part Number: AT32UC3L0256
• Manufacturer: Atmel Corporation

Specifications of AT32UC3L0256

• Flash (kbytes): 256 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 50 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 17
• Hardware Qtouch Acquisition: Yes
• Max I/o Pins: 36
• Ext Interrupts: 36
• Usb Speed: No
• Usb Interface: No
• Spi: 5
• Twi (i2c): 2
• Uart: 4
• Lin: 4
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 460
• Analog Comparators: 8
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.62 to 3.6
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 18
• Input Capture Channels: 12
• Pwm Channels: 35
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

6.1.3.3
32145A–12/2011
3.3V Supply Mode with 1.8V Regulated I/O Lines
In this mode, the internal regulator is connected to the 3.3V source and its output is connected
to both VDDCORE and VDDIO as shown in
use Shutdown mode.
Figure 6-4.
In this mode, some I/O lines are powered by VDDIN while other I/O lines are powered by VDDIO.
Refer to
Refer to the Power Manager chapter for a description of what parts of the system are powered in
Shutdown mode.
Important note: As the regulator has a maximum output current of 60 mA, this mode can only be
used in applications where the maximum I/O current is known and compatible with the core and
peripheral power consumption. Typically, great care must be used to ensure that only a few I/O
lines are toggling at the same time and drive very small loads.
1.98-3.6V
Section 3.2 on page 8
VDDANA
VDDCORE
3.3V Supply Mode with 1.8V Regulated I/O Lines
+
-
for description of power supply for each I/O line.
VDDIN
OSC32K_2,
AST, Wake,
Regulator
regulator
I/O Pins
control
Linear
Figure
ADC
GNDANA
6-4. This configuration is required in order to
AT32UC3L0128/256
VDDIO
Peripherals,
SCIF, BOD,
DFLL, PLL
Memories,
OSC32K,
RCSYS,
I/O Pins
POR33,
RC32K,
SM33
CPU,
GND
39