AT32UC3L0256 Atmel Corporation, AT32UC3L0256 Datasheet - Page 261

• Manufacturer Part Number: AT32UC3L0256
• Manufacturer: Atmel Corporation

Specifications of AT32UC3L0256

• Flash (kbytes): 256 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 50 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 17
• Hardware Qtouch Acquisition: Yes
• Max I/o Pins: 36
• Ext Interrupts: 36
• Usb Speed: No
• Usb Interface: No
• Spi: 5
• Twi (i2c): 2
• Uart: 4
• Lin: 4
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 460
• Analog Comparators: 8
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.62 to 3.6
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 18
• Input Capture Channels: 12
• Pwm Channels: 35
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

32145A–12/2011
In AT32UC3L0128/256, there are 10 generic clocks. These are allocated to different functions
as shown in
Table 13-10. Generic Clock Allocation
Note:
Table 13-11. Generic Clock Sources
OSCSEL
0
1
2
3
4
5
6
7
8
9
10
11
12
13-14
15
Clock number
5
6
7
8
9
0
1
2
3
4
1. GCLK is not routed out.
(1)
(1)
(1)
(1)
(1)
Table
Clock/Oscillator
RCSYS
OSC32K
DFLL0
OSC0
RC120M
CLK_CPU
CLK_HSB
CLK_PBA
CLK_PBB
RC32K
Reserved
CLK_1K
PLL0
Reserved
GCLK_IN0
Function
DFLLIF main reference and GCLK0 pin
(CLK_DFLLIF_REF)
DFLLIF dithering and SSG reference and GCLK1 pin
(CLK_DFLLIF_DITHER)
AST and GCLK2 pin
PWMA and GCLK3 pin
CAT, ACIFB and GCLK4 pin
GLOC
PLL0 source clock
Master generic clock. Can be used as source for other
generic clocks.
13-10. Note that only GCLK4-0 are routed out.
Description
System RC oscillator clock
Output clock from OSC32K
Output clock from DFLL0
Output clock from Oscillator0
Output from 120MHz RCOSC
The clock the CPU runs on
High Speed Bus clock
Peripheral Bus A clock
Peripheral Bus B clock
Output from 32KHz RCOSC
1KHz output clock from OSC32K
Output clock from PLL0
GCLK_IN0 pin, digital clock input
AT32UC3L0128/256
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