MMCCMB2107 Freescale, MMCCMB2107 Datasheet - Page 553

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MMCCMB2107

Manufacturer Part Number
MMCCMB2107
Description
Manufacturer
Freescale
Datasheet

Specifications of MMCCMB2107

Lead Free Status / RoHS Status
Not Compliant
21.12 Low-Level TAP (OnCE) Module
MMC2107 – Rev. 2.0
MOTOROLA
NOTE:
The low-level TAP (OnCE, on-chip emulation) circuitry provides a
simple, inexpensive debugging interface that allows external access to
the processor’s internal registers and to memory/peripherals. OnCE
capabilities are controlled through a serial interface, mapped onto a
JTAG test access port (TAP) protocol.
Refer to
The interface to the OnCE controller and its resources is based on the
TAP defined for JTAG in the IEEE 1149.1 standard.
Figure 21-5
the MMC2107.
Freescale Semiconductor, Inc.
For More Information On This Product,
INFORMATION
PIPELINE
Figure 21-4
JTAG Test Access Port and OnCE
FIFO
PC
Go to: www.freescale.com
shows the OnCE (low-level TAP module) data registers in
Figure 21-4. OnCE Block Diagram
for a block diagram of the OnCE.
COMPARATORS
BREAKPOINT
BREAKPOINT
REGISTERS
AND TRACE
LOGIC
AND
JTAG Test Access Port and OnCE
Low-Level TAP (OnCE) Module
CONTROLLER
AND SERIAL
INTERFACE
OnCE
Technical Data
TCLK
TDI
TMS
TDO
TRST
DE
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