MMCCMB2107 Freescale, MMCCMB2107 Datasheet - Page 540

• Manufacturer Part Number: MMCCMB2107
• Manufacturer: Freescale

Specifications of MMCCMB2107

• Lead Free Status / RoHS Status: Not Compliant

JTAG Test Access Port and OnCE
21.4 Top-Level TAP Controller
Technical Data
540
The top-level TAP controller is responsible for interpreting the sequence
of logical values on the TMS signal. It is a synchronous state machine
that controls the operation of the JTAG logic. The machine’s states are
shown in
the value of the TMS signal sampled on the rising edge of the TCLK
signal.
The top-level TAP controller can be asynchronously reset to the test-
logic-reset state by asserting TRST, test reset. As
holding TMS high (to logic 1) while clocking TCLK through at least five
rising edges will also cause the state machine to enter its test-logic-reset
state.
Freescale Semiconductor, Inc.
For More Information On This Product,
Figure 21-2. Top-Level TAP Controller State Machine
Figure
1
0
JTAG Test Access Port and OnCE
RUN-TEST/IDLE
Go to: www.freescale.com
TEST-LOGIC-
RESET
21-2. The value shown adjacent to each arc represents
0
1
1
0
1
SELECT-DR_SCAN
CAPTURE-DR
UPDATE-DR
PAUSE-DR
SHIFT-DR
EXIT1-DR
EXIT2-DR
0
0
1
0
1
1
0
0
0
1
1
1
0
1
SELECT-IR_SCAN
CAPTURE-IR
UPDATE-IR
Figure 21-2
PAUSE-IR
SHIFT-IR
EXIT1-IR
EXIT2-IR
MMC2107 – Rev. 2.0
0
0
1
0
1
1
0
0
0
1
MOTOROLA
1
shows,