MMCCMB2107 Freescale, MMCCMB2107 Datasheet - Page 26

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MMCCMB2107

Manufacturer Part Number
MMCCMB2107
Description
Manufacturer
Freescale
Datasheet

Specifications of MMCCMB2107

Lead Free Status / RoHS Status
Not Compliant
Table of Contents
Technical Data
26
21.13 Signal Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .555
21.13.1 Debug Serial Input (TDI) . . . . . . . . . . . . . . . . . . . . . . . . . . 555
21.13.2 Debug Serial Clock (TCLK) . . . . . . . . . . . . . . . . . . . . . . . . 555
21.13.3 Debug Serial Output (TDO) . . . . . . . . . . . . . . . . . . . . . . . . 555
21.13.4 Debug Mode Select (TMS). . . . . . . . . . . . . . . . . . . . . . . . . 556
21.13.5 Test Reset (TRST) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 556
21.13.6 Debug Event (DE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 556
21.14 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 556
21.14.1 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 557
21.14.2 OnCE Controller and Serial Interface. . . . . . . . . . . . . . . . . 558
21.14.3 OnCE Interface Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . 559
21.14.3.1
21.14.3.2
21.14.3.3
21.14.3.4
21.14.3.5
21.14.3.6
21.14.3.7
21.14.4 OnCE Controller Registers . . . . . . . . . . . . . . . . . . . . . . . . . 561
21.14.4.1
21.14.4.2
21.14.4.3
21.14.5 OnCE Decoder (ODEC) . . . . . . . . . . . . . . . . . . . . . . . . . . . 570
21.14.6 Memory Breakpoint Logic. . . . . . . . . . . . . . . . . . . . . . . . . . 570
21.14.6.1
21.14.6.2
21.14.7 Breakpoint Address Mask Registers . . . . . . . . . . . . . . . . . 571
21.14.7.1
21.14.7.2
21.14.8 OnCE Trace Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 572
21.14.8.1
21.14.8.2
21.14.9 Methods of Entering Debug Mode . . . . . . . . . . . . . . . . . . . 574
21.14.9.1
21.14.9.2
21.14.9.3
21.14.9.4
Freescale Semiconductor, Inc.
For More Information On This Product,
Internal Debug Request Input (IDR) . . . . . . . . . . . . . . . 559
CPU Debug Acknowledge (DBGACK) . . . . . . . . . . . . . .560
CPU Breakpoint Request (BRKRQ). . . . . . . . . . . . . . . . 560
CPU Address, Attributes (ADDR, ATTR) . . . . . . . . . . . . 560
CPU Status (PSTAT) . . . . . . . . . . . . . . . . . . . . . . . . . . . 560
OnCE Command Register . . . . . . . . . . . . . . . . . . . . . . .561
OnCE Control Register . . . . . . . . . . . . . . . . . . . . . . . . . 564
OnCE Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . 568
Memory Address Latch (MAL) . . . . . . . . . . . . . . . . . . . . 571
Breakpoint Address Base Registers . . . . . . . . . . . . . . . 571
Breakpoint Address Comparators . . . . . . . . . . . . . . . . . 572
Memory Breakpoint Counters . . . . . . . . . . . . . . . . . . . . 572
OnCE Trace Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . 573
Trace Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 574
Debug Request During RESET . . . . . . . . . . . . . . . . . . .574
Debug Request During Normal Activity . . . . . . . . . . . . . 575
Debug Request During Stop, Doze, or Wait Mode . . . .575
Software Request During Normal Activity . . . . . . . . . . . 575
CPU Debug Request (DBGRQ) . . . . . . . . . . . . . . . . . . .560
OnCE Debug Output (DEBUG) . . . . . . . . . . . . . . . . . . . 560
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Table of Contents
MMC2107 – Rev. 2.0
MOTOROLA