MMCCMB2107 Freescale, MMCCMB2107 Datasheet - Page 53

• Manufacturer Part Number: MMCCMB2107
• Manufacturer: Freescale

Specifications of MMCCMB2107

• Lead Free Status / RoHS Status: Not Compliant

MMC2107 – Rev. 2.0
MOTOROLA
1. See module sections for details of how much of each block is being decoded. Accesses to
2. The port register space is mirrored/repeated in the 64-Kbyte block. This allows the full
Base Address (Hex)
Freescale Semiconductor, Inc.
addresses outside the module memory maps (and also the reserved area
0x00d1_0000–0x7fff_ffff) will not be responded to and will result in a bus monitor transfer
error exception.
64-Kbyte block to be decoded and used to execute an external access to a port
replacement unit in emulation mode.
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0x00c0_0000
0x00c1_0000
0x00c2_0000
0x00c3_0000
0x00c4_0000
0x00c5_0000
0x00c6_0000
0x00c7_0000
0x00c8_0000
0x00c9_0000
0x00ca_0000
0x00cb_0000
0x00cc_0000
0x00cd_0000
0x00ce_0000
0x00d0_0000
0x00cf_0000
Table 2-1. Register Address Location Map
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System Memory Map
Queued analog-to-digital converter (QADC)
Serial communications interface 1 (SCI1)
Serial communications interface 2 (SCI2)
Programmable interrupt timer 1 (PIT1)
Programmable interrupt timer 2 (PIT2)
Serial peripheral interface (SPI)
Interrupt controller (INTC)
Chip configuration (CCM)
FLASH registers (CMFR)
Watchdog timer (WDT)
Edge port (EPORT)
Chip selects (CS)
Ports
Clocks (CLOCK)
Reset (RESET)
Timer 1 (TIM1)
Timer 2 (TIM2)
Usage
(2)
(PORTS)
System Memory Map
(1)
Technical Data
Address Map
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