MMCCMB2107 Freescale, MMCCMB2107 Datasheet - Page 102

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MMCCMB2107

Manufacturer Part Number
MMCCMB2107
Description
Manufacturer
Freescale
Datasheet

Specifications of MMCCMB2107

Lead Free Status / RoHS Status
Not Compliant
Chip Configuration Module (CCM)
Technical Data
102
A[22:0], EB[3:0], CS[3:0]
D[31:0], SHS, TA, TEA,
1. Modifying the default configurations is possible only if the external RCON pin is asserted.
2. The D[31:29, 27, 25:24, 20, 15:0] pins do not affect reset configuration.
3. The external reset override circuitry drives the data bus pins with the override values while RSTOUT is asserted. It must
CSE[1:0], TC[2:0], OE,
stop driving the data bus pins within one CLKOUT cycle after RSTOUT is negated. To prevent contention with the external
reset override circuitry, the reset override pins are forced to inputs during reset and do not become outputs until at least
one CLKOUT cycle after RSTOUT is negated.
Pin(s) Affected
Internal FLASH
All output pins
configuration
Clock mode
CS[1:0]
Configuration
RCON[3:2]
RCON[7:6]
V
V
Table 3-7. Configuration During Reset
RCON0
RCON5
Default
Freescale Semiconductor, Inc.
DD
DDSYN
V
For More Information On This Product,
, V
DD
DD
,
Chip Configuration Module (CCM)
,
Go to: www.freescale.com
V
DDSYN
Override Pins
in Reset
D[26,17:16]
D[19:18]
0XX
0XX
10X
D21
10X
D28
111
110
110
111
X0
01
11
, D[23:22]
0
1
1
0
(2),(3)
Master mode
Single-chip mode
FAST mode
Emulation mode
Internal with 32-bit port
External with 16-bit port
External with 32-bit port
Default strength
Full strength
External clock mode (PLL disabled)
1:1 PLL mode
Normal PLL mode with external clock reference
Normal PLL mode w/crystal oscillator reference
Internal FLASH enabled
Internal FLASH disabled
Output Pad Drive Strength
Module Configuration
Chip Mode Selected
(1)
Boot Device
Clock Mode
Function
MMC2107 – Rev. 2.0
MOTOROLA