MMCCMB2107 Freescale, MMCCMB2107 Datasheet - Page 376

• Manufacturer Part Number: MMCCMB2107
• Manufacturer: Freescale

Specifications of MMCCMB2107

• Lead Free Status / RoHS Status: Not Compliant

Serial Peripheral Interface Module (SPI)
17.7.1 SPI Control Register 1
Technical Data
376
Address: 0x00cb_0000
Reset:
Read: Anytime
Write: Anytime
SPIE — SPI Interrupt Enable Bit
SPE — SPI System Enable Bit
SWOM — SPI Wired-OR Mode Bit
Read:
Write:
The SPIE bit enables the SPIF and MODF flags to generate interrupt
requests. Reset clears SPIE.
The SPE bit enables the SPI and dedicates SPI port pins [3:0] to SPI
functions. When SPE is clear, the SPI system is initialized but in a
low-power disabled state. Reset clears SPE.
The SWOM bit configures the output buffers of SPI port pins [3:0] as
open-drain outputs. SWOM controls SPI port pins [3:0] whether they
are SPI outputs or general-purpose outputs. Reset clears SWOM.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = SPIF and MODF interrupt requests enabled
0 = SPIF and MODF interrupt requests disabled
1 = SPI enabled
0 = SPI disabled
1 = Output buffers of SPI port pins [3:0] open-drain
0 = Output buffers of SPI port pins [3:0] CMOS drive
Serial Peripheral Interface Module (SPI)
SPIE
Bit 7
0
Figure 17-2. SPI Control Register 1 (SPICR1)
Go to: www.freescale.com
SPE
6
0
SWOM
5
0
MSTR
4
0
CPOL
3
0
CPHA
2
1
MMC2107 – Rev. 2.0
SSOE
1
0
MOTOROLA
LSBFE
Bit 0
0