MMCCMB2107 Freescale, MMCCMB2107 Datasheet - Page 531

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MMCCMB2107

Manufacturer Part Number
MMCCMB2107
Description
Manufacturer
Freescale
Datasheet

Specifications of MMCCMB2107

Lead Free Status / RoHS Status
Not Compliant
20.8 Interrupts
MMC2107 – Rev. 2.0
MOTOROLA
NOTE:
pin is asserted before the chip select logic asserts the internal cycle
termination signal, then the bus cycle is terminated early.
If internal address bit 31 is 0, then the access is internal. If internal
address bit 31 is 1, then the access is external.
Chip select logic does not decode internal address bits A[30:25].
The chip select module does not generate interrupt requests.
1. The chip selects do not decode A[30:25]. Thus, the total 32-Mbyte block size is
2. If the EMINT bit in the chip configuration module CCR is set, then CS1 matches only
Freescale Semiconductor, Inc.
repeated/mirrored in external memory space.
internal accesses to the 8-MB block starting at address 0 to support emulation of internal
memory. Thus, A[31:23] match 0xxx_xxx0_0.
Chip Select
For More Information On This Product,
CS0
CS1
CS2
CS3
Table 20-4. Chip Select Address Range Encoding
Go to: www.freescale.com
Chip Select Module
Block Size
8 MB
8 MB
8 MB
8 MB
Address Bits Compared
1XXX_XXX0_1
1XXX_XXX0_0
1XXX_XXX1_0
1XXX_XXX1_1
(A[31:23])
Chip Select Module
(1)
Technical Data
(2)
Interrupts
531