MMCCMB2107 Freescale, MMCCMB2107 Datasheet - Page 230
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MMCCMB2107
Manufacturer Part Number
MMCCMB2107
Description
Manufacturer
Freescale
Datasheet
1.MMCCMB2107.pdf
(618 pages)
Specifications of MMCCMB2107
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Clock Module
10.7.2.2 Synthesizer Status Register
Technical Data
230
Address: 0x00c3_0002
Reset:
Read: PLLMODE PLLSEL
Write:
STPMD[1:0] — Stop Mode Bits
RSVD4, RSVD1, and RSVD0 — Reserved
The synthesizer status register (SYNSR) is a read-only register that can
be read at any time. Writing to the SYNSR has no effect and terminates
the cycle normally.
STPMD[1:0] control PLL and CLKOUT operation in stop mode as
shown in
Writing to these read/write bits updates their values but has no effect
on functionality.
Freescale Semiconductor, Inc.
Notes:
STPMD[1:0]
For More Information On This Product,
Note 1
1. Reset state determined during reset configuration.
2. See the LOCKS and LOCK bit descriptions.
Bit 7
Figure 10-3. Synthesizer Status Register (SYNSR)
00
01
10
11
Table 10-4. STPMD[1:0] Operation in Stop Mode
Table
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= Writes have no effect and the access terminates without a transfer error exception.
Note 1
6
Clock Module
10-4.
Disabled
Disabled
Disabled
Disabled
System
Clocks
PLLREF
Note 1
5
Operation During Stop Mode
LOCKS
Note 2
Disabled
Disabled
Enabled
Enabled
4
PLL
Note 2
LOCK
3
Disabled
Enabled
Enabled
Enabled
OSC
LOCS
2
0
MMC2107 – Rev. 2.0
CLKOUT
Disabled
Disabled
Disabled
Enabled
1
0
0
MOTOROLA
Bit 0
0
0