MMCCMB2107 Freescale, MMCCMB2107 Datasheet - Page 525

• Manufacturer Part Number: MMCCMB2107
• Manufacturer: Freescale

Specifications of MMCCMB2107

• Lead Free Status / RoHS Status: Not Compliant

20.6.2 Registers
MMC2107 – Rev. 2.0
MOTOROLA
Address: 0x00c2_0000 and 0x00c2_0001
Reset:
Reset:
Read:
Read:
Write:
Write:
The chip programming model consists of four chip select control
registers (CSCR0–CSCR3), one for each chip select (CS[3:0]).
CSCR0–CSCR3 are read/write always and define the conditions for
asserting the chip select signals.
All the chip select control registers are the same except for the reset
states of the CSEN and PS bits in CSCR0 and the CSEN bit in CSCR1.
This allows CS0 to be enabled at reset with either a 16-bit or 32-bit port
size for selecting an external boot device and allows CS1 to be used to
emulate internal memory.
Freescale Semiconductor, Inc.
Note: Reset state determined during reset configuration.
For More Information On This Product,
Figure 20-2. Chip Select Control Register 0 (CSCR0)
Bit 15
Bit 7
SO
0
0
0
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= Writes have no effect and the access terminates without a transfer error exception.
RO
Chip Select Module
14
0
6
0
0
See note
PS
13
5
0
0
WWS
12
1
4
0
0
WE
11
1
3
0
0
Memory Map and Registers
WS2
10
1
2
0
0
Chip Select Module
TAEN
WS1
9
1
1
1
Technical Data
See note
CSEN
WS0
Bit 8
Bit 0
1
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