MMCCMB2107 Freescale, MMCCMB2107 Datasheet - Page 309

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MMCCMB2107

Manufacturer Part Number
MMCCMB2107
Description
Manufacturer
Freescale
Datasheet

Specifications of MMCCMB2107

Lead Free Status / RoHS Status
Not Compliant
15.7.10 Timer Interrupt Enable Register
MMC2107 – Rev. 2.0
MOTOROLA
Address: TIM1 — 0x00ce_000c
Reset:
Read: Anytime
Write: Anytime
C[3:0]I — Channel Interrupt Enable Bits
Read:
Write:
C[3:0]I enable the C[3:0]F flags in timer flag register 1 to generate
interrupt requests.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Corresponding channel interrupt requests enabled
0 = Corresponding channel interrupt requests disabled
TIM2 — 0x00cf_000c
Figure 15-13. Timer Interrupt Enable Register (TIMIE)
Bit 7
0
0
Timer Modules (TIM1 and TIM2)
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= Writes have no effect and the access terminates without a transfer error exception.
6
0
0
5
0
0
4
0
0
C3I
3
0
Timer Modules (TIM1 and TIM2)
Memory Map and Registers
C2I
2
0
C1I
1
0
Technical Data
Bit 0
C0I
0
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