MMCCMB2107 Freescale, MMCCMB2107 Datasheet - Page 291

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MMCCMB2107

Manufacturer Part Number
MMCCMB2107
Description
Manufacturer
Freescale
Datasheet

Specifications of MMCCMB2107

Lead Free Status / RoHS Status
Not Compliant
14.7.2 Free-Running Timer Operation
14.7.3 Timeout Specifications
MMC2107 – Rev. 2.0
MOTOROLA
PIT CLOCK
COUNTER
MODULUS
PIF
0x0002
This mode of operation is selected when the RLD bit in PCSR is clear.
In this mode, the counter rolls over from 0x0000 to 0xFFFF without
reloading from the modulus latch and continues to decrement.
When the counter reaches a count of 0x0000, the PIF flag is set in
PCSR. If the PIE bit is set in PCSR, the PIF flag issues an interrupt
request to the CPU.
When the OVW bit is set in PCSR, the counter can be directly initialized
by writing to PMR without having to wait for the count to reach 0x0000.
The 16-bit PIT counter and prescaler supports different timeout periods.
The prescaler divides the system clock as selected by the PRE[3:0] bits
in PCSR. The PM[15:0] bits in PMR select the timeout period.
Programmable Interrupt Timer Modules (PIT1 and PIT2)
Figure 14-6. Counter in Free-Running Mode
Freescale Semiconductor, Inc.
For More Information On This Product,
timeout period = PRE[3:0]
Go to: www.freescale.com
0x0001
Programmable Interrupt Timer Modules (PIT1 and PIT2)
0x0005
0x0000
(PM[15:0] + 1) clocks
Functional Description
0xFFFF
Technical Data
291