MMCCMB2107 Freescale, MMCCMB2107 Datasheet - Page 480

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MMCCMB2107

Manufacturer Part Number
MMCCMB2107
Description
Manufacturer
Freescale
Datasheet

Specifications of MMCCMB2107

Lead Free Status / RoHS Status
Not Compliant
Queued Analog-to-Digital Converter (QADC)
18.10.9 Periodic/Interval Timer
Technical Data
480
NOTE:
Example 1 in
remains high for 12 cycles of the system clock. It also shows that when
PSL = 7, the QCLK remains low for eight system clock cycles. In
Example 2, PSH = 7, and the QCLK remains high for eight cycles of the
system clock. It also shows that when PSL = 7, the QCLK remains low
for eight system clock cycles.
The on-chip periodic/interval timer can be used to generate trigger
events at a programmable interval, initiating execution of queue 1 and/or
queue 2. The periodic/interval timer stays reset under these conditions:
Interval timer single-scan mode does not use the periodic/interval timer
until the single-scan enable bit is set.
These conditions will cause a pulsed reset of the periodic/interval timer
during use:
During the low-power stop mode, the periodic/interval timer is held in
reset. Since low-power stop mode causes QACR1 and QACR2 to be
reset to 0, a valid periodic or interval timer mode must be written after
stop mode is exited to release the timer from reset.
When the IPbus internal FREEZE line is asserted and a periodic or
interval timer mode is selected, the timer counter is reset after the
conversion in progress completes. When the periodic or interval timer
Freescale Semiconductor, Inc.
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Queued Analog-to-Digital Converter (QADC)
Both queue 1 and queue 2 are programmed to any mode which
does not use the periodic/interval timer.
IPbus system reset is asserted.
Stop mode is selected.
Debug mode is selected.
A queue 1 operating mode change to a mode which uses the
periodic/interval timer, even if queue 2 is already using the timer
A queue 2 operating mode change to a mode which uses the
periodic/interval timer, provided queue 1 is not in a mode which
uses the periodic/interval timer
Roll over of the timer
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Figure 18-43
shows that when PSH = 11, the QCLK
MMC2107 – Rev. 2.0
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