MMCCMB2107 Freescale, MMCCMB2107 Datasheet - Page 459
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MMCCMB2107
Manufacturer Part Number
MMCCMB2107
Description
Manufacturer
Freescale
Datasheet
1.MMCCMB2107.pdf
(618 pages)
Specifications of MMCCMB2107
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MMC2107 – Rev. 2.0
MOTOROLA
Q1
Q2
QS
Q1
Q2
QS
IDLE
0000
IDLE
0000
IDLE
IDLE
In situation 6
CCW in queue 2 is aborted just before the conversion is complete, so
that queue 1 execution can begin. Queue 2 is considered suspended.
After queue 1 is finished, queue 2 starts over with the first CCW, when
the RES (resume) control bit is set to 0. Situation S7
shows that when pause operation is not in use with queue 2, queue 2
suspension works the same way.
Q1:
Freescale Semiconductor, Inc.
Figure 18-28. CCW Priority Situation 6
Q1:
Figure 18-29. CCW Priority Situation 7
T1
For More Information On This Product,
Queued Analog-to-Digital Converter (QADC)
T1
C1
ACTIVE
C1
ACTIVE
1000
1000
C2
C2
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(Figure
PF1
PF1
0100
Q2:
0100
Q2:
T2
T2
PAUSE
PAUSE
C1
ACTIVE
18-28), the conversion initiated by the second
C1
ACTIVE
0110
0110
C2
C2
T1
T1
C3
SUSPEND
ACTIVE
ACTIVE
SUSPEND
C3
ACTIVE
ACTIVE
1010
1010
Queued Analog-to-Digital Converter (QADC)
C4
C4
CF1
CF1
C1
C1
C2
ACTIVE
C2
RESUME=0
ACTIVE
0010
RESUME = 0
0010
C3
C3
IDLE
IDLE
C4
(Figure
C4
CF2
CF2
IDLE
0000
Technical Data
IDLE
Digital Control
0000
18-29)
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