MMCCMB2107 Freescale, MMCCMB2107 Datasheet - Page 447

• Manufacturer Part Number: MMCCMB2107
• Manufacturer: Freescale

Specifications of MMCCMB2107

• Lead Free Status / RoHS Status: Not Compliant

MMC2107 – Rev. 2.0
MOTOROLA
V
V
PQA4
PQA0
PQB3
PQB0
SSA
V
V
DDA
RH
RL
ANALOG
POWER
10-BIT A/D CONVERTER
Figure 18-19. QADC Analog Subsystem Block Diagram
10-BIT RC
DAC
Therefore, conversion time requires a minimum of 14 QCLK clocks (7 s
with a 2.0-MHz QCLK). If the maximum final sample time period of 16
QCLKs is selected, the total conversion time is 28 QCLKs or 14 s (with
a 2.0-MHz QCLK).
QCLK
Freescale Semiconductor, Inc.
COMPAR-
For More Information On This Product,
Queued Analog-to-Digital Converter (QADC)
CHAN. DECODE & MUX
ATOR
2 CYCLES
BUFFER
SAMPLE
TIME:
SAMPLE
BUFFER
SAMPLE TIME
8: 1
Go to: www.freescale.com
INPUT
CSAMP
N CYCLES
(2,4,8,16)
SAMPLE
FINAL
TIME:
Figure 18-20. Conversion Timing
APPROXIMATION
INTERNAL
CHANNEL
DECODE
4
SUCCESSIVE
STATE MACHINE & LOGIC
REGISTER
10
SUCCESSIVE APPROXIMATION RESOLUTION SEQUENCE
SAR TIMING
BIAS CIRCUIT
10
POWER
DOWN
Queued Analog-to-Digital Converter (QADC)
RESOLUTION
10 CYCLES
TIME:
2
Functional Description
STOP
RST
QCLK
IST
START CONV.
END OF CONV.
SAR[9:0]
BYP
CHAN[5:0]
Technical Data
447