MMCCMB2107 Freescale, MMCCMB2107 Datasheet - Page 389

• Manufacturer Part Number: MMCCMB2107
• Manufacturer: Freescale

Specifications of MMCCMB2107

• Lead Free Status / RoHS Status: Not Compliant

MMC2107 – Rev. 2.0
MOTOROLA
BEGIN TRANSMISSION
Legend:
CHANGE OUTPUT
CHANGE OUTPUT
SS PIN OUTPUT
MSB FIRST (LSBFE = 0):
LSB FIRST (LSBFE = 1):
t
t
t
t
SCK (CPOL = 0)
SCK (CPOL = 1)
SAMPLE INPUT
MASTER ONLY
L
T
I
L
SLAVE SS PIN
= Minimum idling time between transmissions (minimum SS high time)
, t
= Minimum leading time before the first SCK edge
= Minimum trailing time after the last SCK edge
T
MOSI/MISO
, and t
MOSI PIN
MISO PIN
I
are guaranteed for master mode and required for slave mode.
t
L
Figure 17-11. SPI Clock Format 1 (CPHA = 1)
After the 16th and final SCK edge:
Figure 17-11
The SS pin of the master must be either high or configured as a
general-purpose output not affecting the SPI.
MSB
LSB
•
•
Freescale Semiconductor, Inc.
For More Information On This Product,
Data that was in the master SPIDR register is in the slave SPIDR.
Data that was in the slave SPIDR register is in the master SPIDR.
The SCK clock stops and the SPIF flag in SPISR is set, indicating
that the transmission is complete. If the SPIE bit in SPCR1 is set,
SPIF generates an interrupt request.
Serial Peripheral Interface Module (SPI)
BIT 6
BIT 1
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shows the timing of a transmission with the CPHA bit set.
BIT 5
BIT 2
BIT 4
BIT 3
BIT 3
BIT 4
BIT 2
BIT 5
END TRANSMISSION
Serial Peripheral Interface Module (SPI)
BIT 1
BIT 6
MSB
LSB
t
T
Functional Description
MINIMUM 1/2 SCK
t
I
FOR t
t
L
Technical Data
T
, t
L
, t
l
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