MMCCMB2107 Freescale, MMCCMB2107 Datasheet - Page 167

• Manufacturer Part Number: MMCCMB2107
• Manufacturer: Freescale

Specifications of MMCCMB2107

• Lead Free Status / RoHS Status: Not Compliant

7.7.2.9 Priority Level Select Registers
7.8 Functional Description
MMC2107 – Rev. 2.0
MOTOROLA
Address: 0x00c5_0040 through 0x00c5_0067
Reset:
Read:
Write:
There are 40 read/write, 8-bit priority level select registers
PLSR0–PLSR39, one for every interrupt source. The PLSRx register
assigns a priority level to interrupt source x.
PLS[4:0] — Priority Level Select Field
The interrupt controller collects interrupt requests from multiple interrupt
sources and provides an interface to the processor core interrupt logic.
Interrupt controller functions include:
Figure 7-11. Priority Level Select Registers (PLSR0–PLSR39)
The PLS[4:0] field assigns a priority level from 0 to 31 to the
corresponding interrupt source. Reset clears PLS[4:0].
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Interrupt source prioritization
Fast and normal interrupt requests
Autovectored and vectored interrupt requests
Interrupt configuration
Bit 7
0
0
00001–11110
PLS[4:0]
00000
11111
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Interrupt Controller Module
= Writes have no effect and the access terminates without a transfer error exception.
6
0
0
Table 7-3. Priority Select Encoding
5
0
0
Priority Level
31 (highest)
PLS4
0 (lowest)
4
0
1–30
PLS3
3
0
PLS2
Interrupt Controller Module
2
0
Vector Number
00001–11110
Functional Description
00000
11111
PLS1
1
0
Technical Data
PLS0
Bit 0
0
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