MMCCMB2107 Freescale, MMCCMB2107 Datasheet - Page 315

• Manufacturer Part Number: MMCCMB2107
• Manufacturer: Freescale

Specifications of MMCCMB2107

• Lead Free Status / RoHS Status: Not Compliant

15.7.15 Pulse Accumulator Control Register
MMC2107 – Rev. 2.0
MOTOROLA
NOTE:
Address: TIM1 — 0x00ce_0018
Reset:
Read: Anytime
Write: Anytime
PAE — Pulse Accumulator Enable Bit
The pulse accumulator can operate in event mode even when the timer
enable bit, TIMEN, is clear.
PAMOD — Pulse Accumulator Mode Bit
PEDGE — Pulse Accumulator Edge Bit
Read:
Write:
Figure 15-19. Pulse Accumulator Control Register (TIMPACTL)
PAE enables the pulse accumulator.
PAMOD selects event counter mode or gated time accumulation
mode.
PEDGE selects falling or rising edges on the PAI pin to increment the
counter.
In event counter mode (PAMOD = 0):
Freescale Semiconductor, Inc.
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1 = Pulse accumulator enabled
0 = Pulse accumulator disabled
1 = Gated time accumulation mode
0 = Event counter mode
1 = Rising PAI edge increments counter
0 = Falling PAI edge increments counter
TIM2 — 0x00cf_0018
Bit 7
0
0
Timer Modules (TIM1 and TIM2)
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= Writes have no effect and the access terminates without a transfer error exception.
PAE
6
0
PAMOD
5
0
PEDGE
4
0
CLK1
3
0
Timer Modules (TIM1 and TIM2)
Memory Map and Registers
CLK0
2
0
PAOVI
1
0
Technical Data
Bit 0
PAI
0
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