MMCCMB2107 Freescale, MMCCMB2107 Datasheet - Page 475

• Manufacturer Part Number: MMCCMB2107
• Manufacturer: Freescale

Specifications of MMCCMB2107

• Lead Free Status / RoHS Status: Not Compliant

18.10.7.4 Periodic Timer Continuous-Scan Mode
MMC2107 – Rev. 2.0
MOTOROLA
an end-of-queue. However it is useful to take advantage of a smaller
queue in the manner described in the next paragraph.
In the event that the queue completes before the gate closes, a
completion flag will be set and the queue will roll over to the beginning
and continue conversions until the gate closes. If the gate remains open
and the completion flag is not cleared, when the queue completes a
second time the trigger overrun flag will be set and the queue will
roll-over again. The queue will continue to execute until the gate closes
or the mode is disabled.
If the gate closes before queue 1 completes execution, the current CCW
completes execution of queue 1 stops and QADC sets the PF1 bit to
indicate an incomplete queue. Software can read the CWPQ1 to
determine the last valid conversion in the queue. In this mode, if the gate
opens again, execution of queue 1 begins again. The start of queue 1 is
always the first CCW in the CCW table. Since the condition of the gate
is only sampled after each conversion during queue execution, closing
the gate for a period less than a conversion time interval does not
guarantee the closure will be captured.
The QADC includes a dedicated periodic timer for initiating a scan
sequence on queue 1 and/or queue 2. Software selects a programmable
timer interval ranging from 128 to 128K times the QCLK period in binary
multiples. The QCLK period is prescaled down from the IPbus MCU
clock.
When a periodic timer continuous-scan mode is selected for queue 1
and/or queue 2, the timer begins counting. After the programmed
interval elapses, the timer generated trigger event starts the appropriate
queue. Meanwhile, the QADC automatically performs the conversions in
the queue until an end-of-queue condition or a pause is encountered.
When a pause occurs, the QADC waits for the periodic interval to expire
again, then continues with the queue. Once end-of-queue has been
detected, the next trigger event causes queue execution to begin again
with the first CCW in the queue.
The periodic timer generates a trigger event whenever the time interval
elapses. The trigger event may cause the queue execution to continue
following a pause or queue completion, or may be considered a trigger
Freescale Semiconductor, Inc.
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Queued Analog-to-Digital Converter (QADC)
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Queued Analog-to-Digital Converter (QADC)
Technical Data
Digital Control
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