MMCCMB2107 Freescale, MMCCMB2107 Datasheet - Page 198

• Manufacturer Part Number: MMCCMB2107
• Manufacturer: Freescale

Specifications of MMCCMB2107

• Lead Free Status / RoHS Status: Not Compliant

Non-Volatile Memory FLASH (CMFR)
Technical Data
198
CAUTION:
NOTE:
The control of the program/erase pulse timing is divided into three
functions.
The first term of the timing control is the clock scaling, R. The value of R
is determined by the system clock range (SCLKR[2:0]). SCLKR[2:0]
defines the base clock of the pulse timer. Use
SCLKR[2:0] based on the system clock frequency.
If the correct value for SCLKR[2:0] is not selected from the table, the
pulse timer may run too fast and cause damage to the device.
The system clock period is multiplied by the clock scaling value to
generate a 83.3-ns to 125-ns scaled clock. This scaled clock is used to
run the charge pump submodule and the next functional block of the
timing control.
The minimum specified system clock frequency for program and erase
operations is 8.0 MHz. The CMFR does not have any means to monitor
the system clock frequency and cannot prevent program or erase
operation at frequencies below 8.0 MHz. Attempting to program or erase
the CMFR at system clock frequencies lower than 8.0 MHz does not
damage the device if the maximum pulse times and total times are not
exceeded. While some bits in the CMFR array may change state if
programmed or erased at system clock frequencies below 8.0 MHz, the
full program or erase transition is not assured.
SCLKR[2:0]
110 and 111
1. The maximum system clock frequency is 33 MHz.
Freescale Semiconductor, Inc.
000
001
010
011
100
101
For More Information On This Product,
Non-Volatile Memory FLASH (CMFR)
Go to: www.freescale.com
Minimum
Table 9-4. System Clock Range
System Clock Frequency (MHz)
12
18
24
36
8
Reserved by Motorola for future use
Reserved
Maximum
12
18
24
36
40
Table 9-4
(1)
MMC2107 – Rev. 2.0
Clock Scaling (R)
to set
MOTOROLA
3/2
1
2
3
4