EP9312-CB Cirrus Logic Inc, EP9312-CB Datasheet - Page 564
![System-on-Chip Processor](/photos/12/23/122390/mfg_ep9312_series_sml.jpg)
EP9312-CB
Manufacturer Part Number
EP9312-CB
Description
System-on-Chip Processor
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets
1.EP9307-CRZ.pdf
(824 pages)
2.EP9312-IBZ.pdf
(4 pages)
3.EP9312-CB.pdf
(62 pages)
4.EP9312-CB.pdf
(17 pages)
Specifications of EP9312-CB
Peak Reflow Compatible (260 C)
No
A/d Converter
12 Bits
Leaded Process Compatible
No
No. Of I/o Pins
65
Package / Case
352-BGA
Core Processor
ARM9
Core Size
16/32-Bit
Speed
200MHz
Connectivity
EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I²:S, LCD, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No
Other names
598-1257
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP9312-CB
Manufacturer:
CIRRUS
Quantity:
20 000
- EP9307-CRZ PDF datasheet
- EP9312-IBZ PDF datasheet #2
- EP9312-CB PDF datasheet #3
- EP9312-CB PDF datasheet #4
- Current page: 564 of 824
- Download datasheet (13Mb)
15
15-6
UART2
EP93xx User’s Guide
15.3.2 Bus Bandwidth Requirements
If the IrDA SIR functionality is required, UARTCLK must have a frequency between 2.7 MHz
and 542.7 MHz to ensure that the low-power mode transmit pulse duration complies with the
IrDA SIR specification.
There are two basic ways of moving data to and from the UART FIFOs:
Bandwidth requirements also depend on the selected baud rate, character size, parity
selection, number of stop bits, and spacing between characters (if receiving).
For example, assume 115,200 baud, 8-bit characters, even parity, one stop bit, no space
between characters. There are 11 bits per character, so 115,200 / 11 = 10473 characters per
second. If both transmitting and receiving, 20,945 characters per second pass through the
UART. Accessing the UART through the DMA interface requires one access per 32 bits,
implying only 20,945 / 4 = 5,236 AHB accesses per second. Accessing the UART through the
APB requires two accesses per byte, implying 20,945 APB bus accesses.
As another example, assume 230,400 baud (the maximum with a UARTCLK equal to
7.3728 Mhz), 5-bit characters, no parity, one stop bit, and no space between characters.
There are 7 bits per character, so 230400 / 7 = 32,914 characters per second. Simultaneous
transmitting and receiving implies 65829 APB characters per second. Using the DMA
interface would result in 16457 AHB accesses per second, while using the APB to access the
UART leads to 65829 bus accesses per second.
• Direct DMA interface - this permits byte-wide access to the UART without using the
• Accessing the UART via the APB - this requires APB/AHB bus bandwidth. Then, both a
APB. The DMA block will pack/unpack individual bytes so that it reads or writes full 32-
bit words rather than individual bytes.
read and write are required for each 8-bit data byte.
Fuartclk <= 4 x Fpclk
Copyright 2007 Cirrus Logic
DS785UM1
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