EP9312-CB Cirrus Logic Inc, EP9312-CB Datasheet - Page 152

• Manufacturer Part Number: EP9312-CB
• Description: System-on-Chip Processor
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9312-CB

• Peak Reflow Compatible (260 C): No
• A/d Converter: 12 Bits
• Leaded Process Compatible: No
• No. Of I/o Pins: 65
• Package / Case: 352-BGA
• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: No
• Other names: 598-1257

5
5-26
System Controller
EP93xx User’s Guide
Note: The I
Note: The I
are mutually exclusive. Setting both I2SonAc97 and I2SonSSP will cause unexpected
behavior.
are mutually exclusive. Setting both I2SonAc97 and I2SonSSP will cause unexpected
behavior.
2
2
S should be enabled on only one set of pins. Therefore I2SonAc97 and I2SonSSP
S should be enabled on only one set of pins. Therefore I2SonAc97 and I2SonSSP
I2SonAC97:
I2SonSSP:
EonIDE:
PonG:
GonIDE:
HonIDE:
ABITCLK
SSPRX1
SSPTX1
SFRM1
ASYNC
ARSTn
Name
SCLK1
ASDO
ASDI
Pin
SPI Serial Output
Table 5-7. Audio Interfaces Pin Assignment
SPI Frame Clock
Normal Mode
SPI Serial Input
AC'97 Bit Clock
Description
AC'97 Frame
SPI Bit Clock
AC'97 Reset
AC'97 Serial
AC'97 Serial
Copyright 2007 Cirrus Logic
Output
Clock
Input
Pin
Audio - I
pins. See Audio Interface pin assignments in
Audio - I
MCLK is not available in this pin option. See Audio
Interface pin assignments in
GPIO Port E on IDE pins:
0 - GPIO Port E used for IDE
1 - GPIO Port E used for GPIO
PWM 1 output on EGPIO pin
GPIO Port G on IDE pins
0 - GPIO Port G used for IDE
1 - GPIO Port G used for GPIO
GPIO Port H on IDE pins
2
2
AC'97 Serial Output
AC'97 Frame Clock
S on SSP pins. The I
Pin Description
AC'97 Serial Input
S on AC97 pins. The I
I
I
I
2
AC'97 Bit Clock
2
I
(No I
2
2
S Serial Output
S Frame Clock
I
S Serial Clock
AC'97 Reset
S Serial Input
2
S on SSP
Mode
Clock)
2
S Master
Pin Description
SPI Serial Output
SPI Frame Clock
I
I
I
SPI Serial Input
2
I
2
2
I
I
2
2
Table
2
S Master Clock
S Serial Output
SPI Bit Clock
S Frame Clock
S Serial Clock
S Serial Input
S on AC'97
2
Mode
S block uses the SSP pins.
2
S block uses the AC97
5-7.
Table
DS785UM1
5-7.