EP9312-CB Cirrus Logic Inc, EP9312-CB Datasheet - Page 107

• Manufacturer Part Number: EP9312-CB
• Description: System-on-Chip Processor
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9312-CB

• Peak Reflow Compatible (260 C): No
• A/d Converter: 12 Bits
• Leaded Process Compatible: No
• No. Of I/o Pins: 65
• Package / Case: 352-BGA
• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: No
• Other names: 598-1257

DS785UM1
31:28
31:28
cond
cond
Mnemonic:
Bit Definitions:
Definition:
Mnemonic:
Bit Definitions:
Definition:
Mnemonic:
Bit Definitions:
1 1 1 0
1 1 1 0
27:24
27:24
Compare Double Precision Floating Point
Compare 32-bit Integers
CFCMPS<cond> Rd, CRn, CRm
CRn:
CRm:
Rd:
Compares two double precision floating point numbers and stores an integer
representing the result in the ARM920T register; the highest four bits of the
integer result match the N, Z, C, and V bits, respectively, in the ARM920T’s
program status register, while the bottom 28 bits are zeros. If Rd = 15, then the
four status bits are stored in the ARM status register, CPSR.
CFCMPD<cond> Rd, CRn, CRm
CRn:
CRm:
Rd:
Compares two 32-bit integers and stores an integer representing the result in
the ARM920T register; the highest four bits of the integer result match the N,
Z, C, and V bits, respectively, in the ARM920T’s program status register, while
the bottom 28 bits are zeros. If Rd = 15, then the four status bits are stored in
the ARM status register, CPSR.
CFCMP32<cond> Rd, CRn, CRm
CRn:
CRm:
23:22
23:22
0 0
0 0
21
21
0
0
Copyright 2007 Cirrus Logic
20
20
1
1
First source register
Second source register
Destination ARM register. If Rd = 15, destination is ARM
N, C, Z, and V flags.
First source register
Second source register
Destination ARM register. If Rd = 15, destination is ARM
N, C, Z, and V flags.
First source register
Second source register
19:16
19:16
CRn
CRn
15:12
15:12
Rd
Rd
0 1 0 0
0 1 0 1
11:8
11:8
MaverickCrunch Co-Processor
1 0 1
1 0 0
7:5
7:5
EP93xx User’s Guide
4
1
4
1
CRm
CRm
3:0
3:0
3-37
3