EP9312-CB Cirrus Logic Inc, EP9312-CB Datasheet - Page 270

System-on-Chip Processor

EP9312-CB

Manufacturer Part Number
EP9312-CB
Description
System-on-Chip Processor
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets

Specifications of EP9312-CB

Peak Reflow Compatible (260 C)
No
A/d Converter
12 Bits
Leaded Process Compatible
No
No. Of I/o Pins
65
Package / Case
352-BGA
Core Processor
ARM9
Core Size
16/32-Bit
Speed
200MHz
Connectivity
EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No
Other names
598-1257

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP9312-CB
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
Part Number:
EP9312-CB
Manufacturer:
CIRRUS
Quantity:
20 000
Part Number:
EP9312-CBZ
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
8
8-6
Graphics Accelerator
EP93xx User’s Guide
8.4.4 Memory Organization for 16-Bits Per Pixel
The 16 bpp storage format can be used to support high color displays. This mode would
typically be used to implement a 5-bit blue, 6-bit green, 5-bit red color scheme or a 5-bit blue,
5-bit green, 5-bit red color scheme. The least significant byte in 16 bpp mode could also be
used in conjunction with the Raster Engine palette to map 256 color selections to 24 bit
colors. With 256 color mapping, the most significant byte for each pixel would not be used for
color information.
every two bytes.
0x000C
0x002C
0x000C
0x001C
0x005C
0x0000
0x0004
0x0008
0x0010
0x0014
0x0028
0x0000
0x0004
0x0008
0x0010
0x0014
0x0018
0x0050
0x0054
0x0058
.....
.....
Table 8-5
31
31
P(3,0)
P(7,0)
P(3,1)
P(7,1)
P(3,2)
P(7,2)
P(3,5)
P(7,5)
Table 8-5. 16 bpp Memory Organization
Table 8-4. 8 bpp Memory Organization
.....
shows how 16 bpp images are stored in memory as 1 pixel for
Copyright 2007 Cirrus Logic
24 23
P(1,0)
P(3,0)
P(5,0)
P(7,0)
P(1,1)
P(3,1)
P(5,1)
P(7,1)
P(1,5)
P(3,5)
P(5,5)
P(7,5)
.....
P(2,0)
P(6,0)
P(2,1)
P(6,1)
P(2,2)
P(6,2)
P(2,5)
P(6,5)
.....
16 15
16 15
P(1,0)
P(5,0)
P(1,1)
P(5,1)
P(1,2)
P(5,2)
P(1,5)
P(5,5)
.....
P(0,0)
P(2,0)
P(4,0)
P(6,0)
P(0,1)
P(2,1)
P(4,1)
P(6,1)
P(0,5)
P(2,5)
P(4,5)
P(6,5)
8 7
.....
P(0,0)
P(4,0)
P(0,1)
P(4,1)
P(0,2)
P(4,2)
P(0,5)
P(4,5)
.....
0
0
DS785UM1

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