EP9312-CB Cirrus Logic Inc, EP9312-CB Datasheet - Page 458

System-on-Chip Processor

EP9312-CB

Manufacturer Part Number
EP9312-CB
Description
System-on-Chip Processor
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets

Specifications of EP9312-CB

Peak Reflow Compatible (260 C)
No
A/d Converter
12 Bits
Leaded Process Compatible
No
No. Of I/o Pins
65
Package / Case
352-BGA
Core Processor
ARM9
Core Size
16/32-Bit
Speed
200MHz
Connectivity
EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No
Other names
598-1257

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP9312-CB
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
Part Number:
EP9312-CB
Manufacturer:
CIRRUS
Quantity:
20 000
Part Number:
EP9312-CBZ
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
11
HcInterruptEnable
11-18
Universal Serial Bus Host Controller
EP93xx User’s Guide
MIE
31
15
Address:
Default:
Definition:
Bit Descriptions:
OC
30
14
29
13
28
12
FNO:
RHSC:
OC:
0x8002_0010
0x0000_0000
Enables interrupt sources.
RSVD:
SO:
WDH:
SF:
RD:
UE:
RSVD
27
11
26
10
Copyright 2007 Cirrus Logic
25
9
FrameNumberOverflow. This bit is set when the MSB of
HcFmNumber (bit 15) changes value, from 0 to 1 or from 1
to 0, and after HccaFrameNumber has been updated.
RootHubStatusChange. This bit is set when the content of
HcRhStatus or the content of any of
HcRhPortStatus[NumberofDownstreamPort] has changed.
OwnershipChange. This bit is set by HC when HCD sets
the OwnershipChangeRequest field in
HcCommandStatus. This event, when unmasked, will
always generate a System Management Interrupt (SMI)
immediately. This bit is tied to 0b when the SMI pin is not
implemented.
Reserved. Unknown During Read.
SchedulingOverrun. Enable interrupt generation due to
Scheduling Overrun.
WritebackDoneHead. Enable interrupt generation due to
HcDoneHead Writeback.
StartofFrame. Enable interrupt generation due to Start of
Frame.
ResumeDetected. Enable interrupt generation due to
Resume Detect.
UnrecoverableError. Enable interrupt generation due to
Unrecoverable Error.
24
8
23
7
RSVD
RHSC
22
6
FNO
21
5
UE
20
4
RD
19
3
SF
18
2
WDH
17
1
DS785UM1
SO
16
0

Related parts for EP9312-CB