EP9312-CB Cirrus Logic Inc, EP9312-CB Datasheet - Page 151
EP9312-CB
Manufacturer Part Number
EP9312-CB
Description
System-on-Chip Processor
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets
1.EP9307-CRZ.pdf
(824 pages)
2.EP9312-IBZ.pdf
(4 pages)
3.EP9312-CB.pdf
(62 pages)
4.EP9312-CB.pdf
(17 pages)
Specifications of EP9312-CB
Peak Reflow Compatible (260 C)
No
A/d Converter
12 Bits
Leaded Process Compatible
No
No. Of I/o Pins
65
Package / Case
352-BGA
Core Processor
ARM9
Core Size
16/32-Bit
Speed
200MHz
Connectivity
EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I²:S, LCD, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No
Other names
598-1257
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP9312-CB
Manufacturer:
CIRRUS
Quantity:
20 000
- EP9307-CRZ PDF datasheet
- EP9312-IBZ PDF datasheet #2
- EP9312-CB PDF datasheet #3
- EP9312-CB PDF datasheet #4
- Current page: 151 of 824
- Download datasheet (13Mb)
DeviceCfg
DS785UM1
SWRST
HC3IN
31
15
Address:
Default:
Definition:
Bit Descriptions:
HC3EN
D1onG
30
14
D0onG
HC1IN
29
13
HC1EN
IonU2
28
12
0x8093_0080 - Read/Write, Software locked
0x0000_0000
Device Configuration Register. This register controls the operation of major
system functions.
RSVD:
0:
SHena:
KEYS:
ADCPD:
RAS:
RasOnP3:
HonIDE
GonK
27
11
GonIDE
TonG
26
10
Copyright 2007 Cirrus Logic
MonG
PonG
25
9
Reserved. Unknown During Read.
This bit must be written as “0”.
Standby/Halt enable. When 1, allows the system to enter
Standby or Halt on a read from the Standby and Halt
registers, respectively.
Key matrix inactive.
1 - Key Matrix controller inactive,
0 - Key Matrix controller active.
ADC Power Down.
1 - ADC and clocks are powered down.
0 - ADC and clocks are active. ADCPD must be zero for
normal touch screen operation and for direct ADC
operation.
Raster inactive.
1 - Disables video pixel clock to most of the Raster engine,
0 - Normal video clock to Raster engine.
Raster On SDRAM Port 3.
1 - The Raster video refresh SDRAM accesses use the
system primary AHB to get video data.
0 - Raster video refresh uses the private AHB on SDRAM
Port 0.
EonIDE
U3EN
24
8
CPENA
I2Son
SSP
23
7
A2onG
I2Son
AC97
22
6
A1onG
21
5
0
RASOn
U2EN
P3
20
4
EXVC
RAS
19
3
EP93xx User’s Guide
ADCPD
U1EN
System Controller
18
2
KEYS
TIN
17
1
SHena
RSVD
5-25
16
0
5
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